diff options
author | 2023-02-24 12:08:51 +0800 | |
---|---|---|
committer | 2023-03-01 17:28:17 -0800 | |
commit | 0af3f115e68ea9b46fe56fa7af554c61a966a23c (patch) | |
tree | 063c09bb8d85218e197347e7393fdd66a85e85d6 /scripts/coverage | |
parent | target/riscv: Add *envcfg.PBMTE related check in address translation (diff) | |
download | qemu-0af3f115e68ea9b46fe56fa7af554c61a966a23c.tar.xz qemu-0af3f115e68ea9b46fe56fa7af554c61a966a23c.zip |
target/riscv: Add *envcfg.HADE related check in address translation
When menvcfg.HADE is 1, hardware updating of PTE A/D bits is enabled
during single-stage address translation. When the hypervisor extension is
implemented, if menvcfg.HADE is 1, hardware updating of PTE A/D bits is
enabled during G-stage address translation.
Set *envcfg.HADE default true for backward compatibility.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20230224040852.37109-6-liweiwei@iscas.ac.cn>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'scripts/coverage')
0 files changed, 0 insertions, 0 deletions