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| author |   Peter Maydell <peter.maydell@linaro.org> | 2017-02-28 12:08:19 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-02-28 12:08:19 +0000 |
| commit | 5db53e353dfe08492aca793b4748d8182f9780b3 (patch) | |
| tree | 52b101dd3998867f7529ed7a4fc89f8a26dab7cb /scripts/qapi-commands.py | |
| parent | armv7m: Raise correct kind of UsageFault for attempts to execute ARM code (diff) | |
| download | qemu-5db53e353dfe08492aca793b4748d8182f9780b3.tar.xz qemu-5db53e353dfe08492aca793b4748d8182f9780b3.zip | |
armv7m: Allow SHCSR writes to change pending and active bits
Implement the NVIC SHCSR write behaviour which allows pending and
active status of some exceptions to be changed.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Diffstat (limited to 'scripts/qapi-commands.py')
0 files changed, 0 insertions, 0 deletions