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| author |   Anup Patel <anup.patel@wdc.com> | 2022-02-04 23:16:49 +0530 |
|---|---|---|
| committer |   Alistair Francis <alistair.francis@wdc.com> | 2022-02-16 12:24:19 +1000 |
| commit | c7de92b4e829b0df4087371b23e41bbe8aec766d (patch) | |
| tree | dfd758a1300f3c5aa640de2c74b6a46fd47e48d3 /scripts/qapi/commands.py | |
| parent | target/riscv: Implement AIA interrupt filtering CSRs (diff) | |
| download | qemu-c7de92b4e829b0df4087371b23e41bbe8aec766d.tar.xz qemu-c7de92b4e829b0df4087371b23e41bbe8aec766d.zip | |
target/riscv: Implement AIA mtopi, stopi, and vstopi CSRs
The AIA specification introduces new [m|s|vs]topi CSRs for
reporting pending local IRQ number and associated IRQ priority.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Message-id: 20220204174700.534953-14-anup@brainfault.org
[ Changed by AF:
- Fixup indentation
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/qapi/commands.py')
0 files changed, 0 insertions, 0 deletions