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| author |   Alistair Francis <alistair.francis@wdc.com> | 2020-01-31 17:03:08 -0800 |
|---|---|---|
| committer |   Palmer Dabbelt <palmerdabbelt@google.com> | 2020-02-27 13:46:33 -0800 |
| commit | e44b50b5b2e508fdd24915ab0e44ac49685e1de3 (patch) | |
| tree | e0a6d6fa3b43bbab5534860e590114d95e90f0b6 /scripts/qapi/expr.py | |
| parent | target/riscv: Add support for the 32-bit MSTATUSH CSR (diff) | |
| download | qemu-e44b50b5b2e508fdd24915ab0e44ac49685e1de3.tar.xz qemu-e44b50b5b2e508fdd24915ab0e44ac49685e1de3.zip | |
target/riscv: Add the MSTATUS_MPV_ISSET helper macro
Add a helper macro MSTATUS_MPV_ISSET() which will determine if the
MSTATUS_MPV bit is set for both 32-bit and 64-bit RISC-V.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'scripts/qapi/expr.py')
0 files changed, 0 insertions, 0 deletions