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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2024-08-13 12:05:42 +0200
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2024-08-20 00:38:48 +0200
commit7ce9760d64e8a884f044f95a1f32f96c2e0fafa0 (patch)
tree70d5d523103919afac5341adc8c63e1792e587da /scripts/qapi/ssh:/git@git.zx2c4.com/git:
parenttarget/mips: Pass page table entry size as MemOp to get_pte() (diff)
target/mips: Use correct MMU index in get_pte()
When refactoring page_table_walk_refill() in commit 4e999bf419 we missed the indirect call to cpu_mmu_index() in get_pte(): page_table_walk_refill() -> get_pte() -> cpu_ld[lq]_code() -> cpu_mmu_index() Since we don't mask anymore the modes in hflags, cpu_mmu_index() can return UM or SM, while we only expect KM or ERL. Fix by propagating ptw_mmu_idx to get_pte(), and use the cpu_ld/st_code_mmu() API with the correct MemOpIdx. Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Reported-by: Waldemar Brodkorb <wbx@uclibc-ng.org> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2470 Fixes: 4e999bf419 ("target/mips: Pass ptw_mmu_idx down from mips_cpu_tlb_fill") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240814090452.2591-3-philmd@linaro.org>
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