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author | 2014-09-26 20:36:09 +0100 | |
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committer | 2014-10-20 12:25:07 +0100 | |
commit | 3a16ecb06355d0bfc8b547eba094ebaa44dce39f (patch) | |
tree | 12b8a1f2134b0e6cf4ce0ec71cf876a2cc38eadd /target-openrisc/exception.c | |
parent | target-tricore: Add instructions of BIT opcode format (diff) | |
download | qemu-3a16ecb06355d0bfc8b547eba094ebaa44dce39f.tar.xz qemu-3a16ecb06355d0bfc8b547eba094ebaa44dce39f.zip |
target-tricore: Add instructions of BO opcode format
Add instructions of BO opcode format.
Add microcode generator functions gen_swap, gen_ldmst.
Add microcode generator functions gen_st/ld_preincr, which write back the address after the memory access.
Add helper for circular and bit reverse addr mode calculation.
Add sign extended bitmask for BO_OFF10 field.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-openrisc/exception.c')
0 files changed, 0 insertions, 0 deletions