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* util/cpuinfo-riscv: Support host/cpuinfo.h for riscvRichard Henderson2024-07-031-0/+23
* Revert "host/i386: assume presence of SSE2"Paolo Bonzini2024-06-282-2/+4
* Revert "host/i386: assume presence of POPCNT"Paolo Bonzini2024-06-281-0/+1
* util/bufferiszero: Add loongarch64 vector accelerationRichard Henderson2024-06-191-0/+143
* util/bufferiszero: Split out host include filesRichard Henderson2024-06-194-0/+211
* util/loongarch64: Detect LASX vector supportRichard Henderson2024-06-191-0/+1
* host/i386: assume presence of POPCNTPaolo Bonzini2024-06-051-1/+0
* host/i386: assume presence of SSE2Paolo Bonzini2024-06-051-1/+0
* host/i386: assume presence of CMOVPaolo Bonzini2024-06-051-1/+0
* host/i386: nothing looks at CPUINFO_SSE4Paolo Bonzini2024-06-051-1/+0
* accel/tcg: Rename load-extract/store-insert headers using .h.inc suffixPhilippe Mathieu-Daudé2024-04-267-0/+0
* host/include/generic/host/atomic128: Fix compilation problem with Clang 17Thomas Huth2023-11-132-2/+2
* host/include/loongarch64: Add atomic16 load and storeRichard Henderson2023-11-063-0/+103
* util: Add cpuinfo for loongarch64Richard Henderson2023-11-061-0/+21
* i386: spelling fixesMichael Tokarev2023-09-201-1/+1
* ppc: spelling fixesMichael Tokarev2023-09-201-1/+1
* Merge tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi2023-09-191-0/+1
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| * util/cpuinfo-aarch64: Add CPUINFO_BTIRichard Henderson2023-09-161-0/+1
* | host/include/aarch64: Implement clmul.hRichard Henderson2023-09-152-0/+42
* | host/include/i386: Implement clmul.hRichard Henderson2023-09-153-0/+31
* | crypto: Add generic 64-bit carry-less multiply routineRichard Henderson2023-09-151-0/+15
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* other architectures: spelling fixesMichael Tokarev2023-07-251-1/+1
* arm: spelling fixesMichael Tokarev2023-07-251-1/+1
* host/include/ppc: Implement aes-round.hRichard Henderson2023-07-083-0/+184
* host/include/aarch64: Implement aes-round.hRichard Henderson2023-07-082-0/+206
* host/include/i386: Implement aes-round.hRichard Henderson2023-07-083-0/+154
* crypto: Add aesdec_ISB_ISR_AK_IMCRichard Henderson2023-07-081-0/+3
* crypto: Add aesdec_ISB_ISR_IMC_AKRichard Henderson2023-07-081-0/+3
* crypto: Add aesenc_SB_SR_MC_AKRichard Henderson2023-07-081-0/+3
* crypto: Add aesdec_IMCRichard Henderson2023-07-081-0/+2
* crypto: Add aesenc_MCRichard Henderson2023-07-081-0/+2
* crypto: Add aesdec_ISB_ISR_AKRichard Henderson2023-07-081-0/+4
* crypto: Add aesenc_SB_SR_AKRichard Henderson2023-07-081-0/+16
* util: Add cpuinfo-ppc.cRichard Henderson2023-07-082-0/+30
* host/include/x86_64: Use __m128i for "x" constraintsRichard Henderson2023-06-202-13/+20
* accel/tcg: Add aarch64 store_atom_insert_al16Richard Henderson2023-05-301-0/+47
* accel/tcg: Add aarch64 lse2 load_atom_extract_al16_or_al8Richard Henderson2023-05-301-0/+40
* accel/tcg: Add x86_64 load_atom_extract_al16_or_al8Richard Henderson2023-05-301-0/+50
* accel/tcg: Extract store_atom_insert_al16 to host headerRichard Henderson2023-05-301-0/+50
* accel/tcg: Extract load_atom_extract_al16_or_al8 to host headerRichard Henderson2023-05-301-0/+45
* qemu/atomic128: Add x86_64 atomic128-ldst.hRichard Henderson2023-05-301-0/+68
* qemu/atomic128: Add runtime test for FEAT_LSE2Richard Henderson2023-05-231-13/+40
* qemu/atomic128: Improve cmpxchg fallback for atomic16_setRichard Henderson2023-05-231-4/+7
* qemu/atomic128: Split atomic16_readRichard Henderson2023-05-232-17/+35
* accel/tcg: Eliminate #if on HAVE_ATOMIC128 and HAVE_CMPXCHG128Richard Henderson2023-05-232-1/+3
* include/qemu: Move CONFIG_ATOMIC128_OPT handling to atomic128.hRichard Henderson2023-05-232-10/+20
* include/host: Split out atomic128-ldst.hRichard Henderson2023-05-232-0/+106
* include/host: Split out atomic128-cas.hRichard Henderson2023-05-232-0/+86
* util: Add cpuinfo-aarch64.cRichard Henderson2023-05-231-0/+22
* util: Add i386 CPUINFO_ATOMIC_VMOVDQURichard Henderson2023-05-231-0/+1
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