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path: root/include/hw/intc/arm_gicv3_common.h (follow)
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* hw/intc/arm_gicv3: Add NMI handling CPU interface registersPeter Maydell2024-04-251-0/+7
* hw/intc/arm_gicv3: Add irq non-maskable propertyJinjie Ruan2024-04-251-0/+4
* hw/intc/arm_gicv3: Add has-nmi property to GICv3 deviceJinjie Ruan2024-04-251-0/+1
* hw/intc/arm_gicv3: Add external IRQ lines for NMIJinjie Ruan2024-04-251-0/+2
* hw/intc/arm_gic: Un-inline GIC*/ITS class_name() helpersPhilippe Mathieu-Daudé2023-06-281-0/+10
* hw/intc/arm_gicv3: Use correct number of priority bits for the CPUPeter Maydell2022-05-191-0/+1
* hw/intc/arm_gicv3: Support configurable number of physical priority bitsPeter Maydell2022-05-191-5/+2
* hw/intc/arm_gicv3_cpuif: Support vLPIsPeter Maydell2022-04-221-0/+3
* hw/intc/arm_gicv3: Implement new GICv4 redistributor registersPeter Maydell2022-04-221-0/+3
* hw/intc/arm_gicv3: Implement GICv4's new redistributor framePeter Maydell2022-04-221-0/+5
* hw/intc/arm_gicv3: Keep pointers to every connected ITSPeter Maydell2022-04-221-0/+2
* hw/intc/arm_gicv3: Support multiple redistributor regionsPeter Maydell2021-11-151-1/+11
* hw/intc/arm_gicv3: Move checking of redist-region-count to arm_gicv3_common_realizePeter Maydell2021-11-151-1/+1
* hw/intc: GICv3 redistributor ITS processingShashi Mallela2021-09-131-0/+7
* hw/intc: GICv3 ITS Feature enablementShashi Mallela2021-09-131-0/+1
* hw/intc: GICv3 ITS Command processingShashi Mallela2021-09-131-0/+2
* hw/intc: GICv3 ITS register definitions addedShashi Mallela2021-09-131-0/+3
* hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts workPeter Maydell2020-11-021-1/+0
* Use DECLARE_*CHECKER* macrosEduardo Habkost2020-09-091-6/+2
* Move QOM typedefs and add missing includesEduardo Habkost2020-09-091-2/+4
* hw/intc/gicv3: Remove useless parenthesis around DIV_ROUND_UP macroPhilippe Mathieu-Daudé2018-10-261-1/+1
* hw/intc/arm_gicv3: Introduce redist-region-count array propertyEric Auger2018-06-221-2/+6
* arm_gicv3_kvm: kvm_dist_get/put: skip the registers banked by GICRShannon Zhao2018-06-081-0/+1
* hw/intc/arm_gicv3_kvm: Add ICC_SRE_EL1 register to vmstateVijaya Kumar K2017-02-281-0/+1
* hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update()Peter Maydell2017-01-201-0/+1
* hw/intc/gicv3: Add data fields for virtualization supportPeter Maydell2017-01-201-0/+18
* hw/intc/arm_gicv3: Add external IRQ lines for VIRQ and VFIQPeter Maydell2017-01-201-0/+2
* gic: provide defines for v2/v3 targetlist sizesAndrew Jones2016-07-141-0/+3
* hw/intc/arm_gicv3: Implement functions to identify next pending irqPeter Maydell2016-06-171-0/+18
* hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structurePeter Maydell2016-06-171-3/+2
* hw/intc/arm_gicv3: Add state informationPavel Fedin2016-06-171-3/+189
* hw/intc: Implement GIC-500 base classShlomo Pongratz2015-09-241-0/+68
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