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path: root/tcg/mips/tcg-target.c.inc (follow)
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* tcg: Add TCGConst argument to tcg_target_const_matchRichard Henderson2024-02-031-1/+2
* tcg/mips: Implement neg opcodesRichard Henderson2023-11-061-0/+8
* tcg/mips: Always implement movcondRichard Henderson2023-11-061-5/+14
* tcg/mips: Split out tcg_out_setcond_intRichard Henderson2023-11-061-172/+106
* tcg/mips: Use tcg_use_softmmuRichard Henderson2023-10-221-110/+105
* tcg: Correct invalid mentions of 'softmmu' by 'system-mode'Philippe Mathieu-Daudé2023-10-071-2/+2
* tcg: Add tcg_out_tb_start backend hookRichard Henderson2023-09-161-0/+5
* tcg: pass vece to tcg_target_const_match()Jiajie Chen2023-09-151-1/+1
* tcg: Add tlb_fast_offset to TCGContextRichard Henderson2023-06-051-3/+4
* tcg: Widen CPUTLBEntry comparators to 64-bitsRichard Henderson2023-06-051-5/+8
* tcg/mips: Replace MIPS_BE with HOST_BIG_ENDIANRichard Henderson2023-05-251-26/+20
* tcg/mips: Use qemu_build_not_reached for LO/HI_OFFRichard Henderson2023-05-251-5/+3
* tcg/mips: Try three insns with shift and add in tcg_out_moviRichard Henderson2023-05-251-0/+44
* tcg/mips: Try tb-relative addresses in tcg_out_moviRichard Henderson2023-05-251-0/+13
* tcg/mips: Aggressively use the constant pool for n64 callsRichard Henderson2023-05-251-3/+13
* tcg/mips: Use the constant pool for 64-bit constantsRichard Henderson2023-05-251-17/+48
* tcg/mips: Split out tcg_out_movi_twoRichard Henderson2023-05-251-11/+24
* tcg/mips: Split out tcg_out_movi_oneRichard Henderson2023-05-251-6/+20
* tcg/mips: Create and use TCG_REG_TBRichard Henderson2023-05-251-10/+59
* tcg/mips: Unify TCG_GUEST_BASE_REG testsRichard Henderson2023-05-251-1/+1
* tcg/mips: Move TCG_GUEST_BASE_REG to S7Richard Henderson2023-05-251-2/+2
* tcg/mips: Move TCG_AREG0 to S8Richard Henderson2023-05-251-2/+2
* tcg: Add page_bits and page_mask to TCGContextRichard Henderson2023-05-161-3/+3
* tcg/mips: Remove TARGET_LONG_BITS, TCG_TYPE_TLRichard Henderson2023-05-161-19/+23
* tcg: Split INDEX_op_qemu_{ld,st}* for guest address sizeRichard Henderson2023-05-161-24/+42
* tcg/mips: Use atom_and_align_for_opcRichard Henderson2023-05-161-6/+9
* tcg: Introduce tcg_target_has_memory_bswapRichard Henderson2023-05-161-0/+5
* tcg/mips: Use full load/store helpers in user-only modeRichard Henderson2023-05-161-55/+2
* tcg: Unify helper_{be,le}_{ld,st}*Richard Henderson2023-05-161-31/+0
* tcg/mips: Simplify constraints on qemu_ld/stRichard Henderson2023-05-111-22/+8
* tcg/mips: Reorg tlb load within prepare_host_addrRichard Henderson2023-05-111-20/+18
* tcg/mips: Remove MO_BSWAP handlingRichard Henderson2023-05-111-238/+46
* tcg/mips: Convert tcg_out_qemu_{ld,st}_slow_pathRichard Henderson2023-05-111-132/+22
* tcg/mips: Introduce prepare_host_addrRichard Henderson2023-05-111-232/+172
* tcg/mips: Rationalize args to tcg_out_qemu_{ld,st}Richard Henderson2023-05-051-91/+95
* tcg/mips: Conditionalize tcg_out_exts_i32_i64Richard Henderson2023-05-021-1/+3
* tcg: Introduce tcg_out_xchgRichard Henderson2023-04-231-0/+5
* tcg: Split out tcg_out_extrl_i64_i32Richard Henderson2023-04-231-3/+6
* tcg: Split out tcg_out_extu_i32_i64Richard Henderson2023-04-231-3/+6
* tcg: Split out tcg_out_exts_i32_i64Richard Henderson2023-04-231-1/+6
* tcg: Split out tcg_out_ext32uRichard Henderson2023-04-231-1/+2
* tcg: Split out tcg_out_ext32sRichard Henderson2023-04-231-3/+9
* tcg: Split out tcg_out_ext16uRichard Henderson2023-04-231-0/+5
* tcg: Split out tcg_out_ext16sRichard Henderson2023-04-231-3/+8
* tcg: Split out tcg_out_ext8uRichard Henderson2023-04-231-1/+8
* tcg: Split out tcg_out_ext8sRichard Henderson2023-04-231-4/+8
* tcg: Replace tcg_abort with g_assert_not_reachedRichard Henderson2023-04-231-7/+7
* tcg: Introduce tcg_target_call_oarg_regRichard Henderson2023-02-041-4/+6
* tcg: Introduce tcg_out_addi_ptrRichard Henderson2023-02-041-0/+7
* tcg: Remove TCG_TARGET_HAS_direct_jumpRichard Henderson2023-01-171-1/+0
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