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| author |   Aki Tomita <aki.tomita@ni.com> | 2023-03-02 21:28:35 -0600 |
|---|---|---|
| committer |   michael-west <michael.west@ettus.com> | 2023-03-03 12:11:12 -0800 |
| commit | 106afff8890a4161e00bcebca0ed673890d2fdc0 (patch) | |
| tree | 01ab2ff7c7cd9cbc67f1ae808e04aaed57ef773a | |
| parent | fpga: Delete extra comment line (diff) | |
| download | uhd-106afff8890a4161e00bcebca0ed673890d2fdc0.tar.xz uhd-106afff8890a4161e00bcebca0ed673890d2fdc0.zip | |
fpga: Additional comment cleanup
| -rw-r--r-- | fpga/usrp3/top/x300/x300.v | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/fpga/usrp3/top/x300/x300.v b/fpga/usrp3/top/x300/x300.v index 8fbfa39b9..b4142089f 100644 --- a/fpga/usrp3/top/x300/x300.v +++ b/fpga/usrp3/top/x300/x300.v @@ -1,4 +1,3 @@ -/////////////////////////////////// // // Copyright 2016-2017 Ettus Research LLC // Copyright 2017 Ettus Research, a National Instruments Company @@ -12,7 +11,6 @@ // SFP1_10GBE - Ethernet Port1 is configured for 10G (default is 1G) // DEBUG_UART - Adds 115kbaud UART to GPIO pins 10 & 11 for firmware debug // -/////////////////////////////////// //Defines `LVFPGA_IFACE constants `include "../../lib/io_port2/LvFpga_Chinch_Interface.vh" |