diff options
| author |   mattprost <matt.prost@ni.com> | 2020-08-10 17:36:09 -0500 |
|---|---|---|
| committer |   Wade Fife <wade.fife@ettus.com> | 2020-08-12 15:17:48 -0500 |
| commit | e8db6fa4301ce471bf41ef14d5d38e5727199007 (patch) | |
| tree | 77b52318278b8d770a1fd64a195813bd9a6a899a | |
| parent | fpga: rfnoc: Fix clock crossing in axis_data_to_chdr (diff) | |
| download | uhd-e8db6fa4301ce471bf41ef14d5d38e5727199007.tar.xz uhd-e8db6fa4301ce471bf41ef14d5d38e5727199007.zip | |
n320: Double radio ingress buffer size
This increases the size of the ingress buffers for the N320 radio to
support 250MHz TX streaming rates.
Signed-off-by: mattprost <matt.prost@ni.com>
| -rw-r--r-- | fpga/usrp3/top/n3xx/n320_rfnoc_image_core.v | 12 | ||||
| -rw-r--r-- | fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml | 4 |
2 files changed, 8 insertions, 8 deletions
diff --git a/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.v b/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.v index 875c8ade1..40c76d629 100644 --- a/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.v +++ b/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.v @@ -1,5 +1,5 @@ // -// Copyright 2019 Ettus Research, A National Instruments Brand +// Copyright 2020 Ettus Research, A National Instruments Brand // // SPDX-License-Identifier: LGPL-3.0-or-later // @@ -7,9 +7,9 @@ // Module: rfnoc_image_core (for n320) // This file was autogenerated by UHD's image builder tool (rfnoc_image_builder) // Re-running that tool will overwrite this file! -// File generated on: 2019-11-08T15:58:13.514800 -// Source: ./n3xx/n320_rfnoc_image_core.yml -// Source SHA256: 2641d416e72d1a537f6a832837fc0c9b69675bfe6be7521370900c067742b0bb +// File generated on: 2020-08-10T16:16:40.486292 +// Source: ./n320_rfnoc_image_core.yml +// Source SHA256: dd1cf12171ae4b9c0e66dca548a881337bb27815a1ed9c18cd151459939de6bf module rfnoc_image_core #( parameter [15:0] PROTOVER = {8'd1, 8'd0} @@ -218,7 +218,7 @@ module rfnoc_image_core #( .NUM_DATA_O (1), .INST_NUM (0), .CTRL_XBAR_PORT (1), - .INGRESS_BUFF_SIZE (15), + .INGRESS_BUFF_SIZE (16), .MTU (MTU), .REPORT_STRM_ERRS (1) ) ep0_i ( @@ -279,7 +279,7 @@ module rfnoc_image_core #( .NUM_DATA_O (1), .INST_NUM (1), .CTRL_XBAR_PORT (2), - .INGRESS_BUFF_SIZE (15), + .INGRESS_BUFF_SIZE (16), .MTU (MTU), .REPORT_STRM_ERRS (1) ) ep1_i ( diff --git a/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml b/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml index e107eebc7..5f1850d52 100644 --- a/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml +++ b/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml @@ -15,11 +15,11 @@ stream_endpoints: ep0: # Stream endpoint name ctrl: True # Endpoint passes control traffic data: True # Endpoint passes data traffic - buff_size: 32768 # Ingress buffer size for data + buff_size: 65536 # Ingress buffer size for data ep1: # Stream endpoint name ctrl: False # Endpoint passes control traffic data: True # Endpoint passes data traffic - buff_size: 32768 # Ingress buffer size for data + buff_size: 65536 # Ingress buffer size for data # A list of all NoC blocks in design # ---------------------------------- |