mpmd: Add discoverable feature for trig i/o mode

6 files changed, 105 insertions, 2 deletions

diff --git a/host/include/uhd/features/discoverable_feature.hpp b/host/include/uhd/features/discoverable_feature.hpp
index 8cbe8e13f..b1a03eaea 100644
--- a/host/include/uhd/features/discoverable_feature.hpp
+++ b/host/include/uhd/features/discoverable_feature.hpp
@@ -34,6 +34,7 @@ public:
         FPGA_LOAD_NOTIFICATION,
         ADC_SELF_CALIBRATION,
         REF_CLK_CALIBRATION,
+        TRIG_IO_MODE,
     };
 
     virtual ~discoverable_feature() = default;
diff --git a/host/include/uhd/features/trig_io_mode_iface.hpp b/host/include/uhd/features/trig_io_mode_iface.hpp
new file mode 100644
index 000000000..53b0ff19f
--- /dev/null
+++ b/host/include/uhd/features/trig_io_mode_iface.hpp
@@ -0,0 +1,40 @@
+//
+// Copyright 2021 Ettus Research, a National Instruments Brand
+//
+// SPDX-License-Identifier: GPL-3.0-or-later
+//
+
+#pragma once
+
+#include <uhd/features/discoverable_feature.hpp>
+#include <uhd/types/trig_io_mode.hpp>
+#include <memory>
+#include <string>
+
+namespace uhd { namespace features {
+
+/*! Interface to provide access to set the mode of the Trig In/Out port.
+ *  Currently, only the X4xx series of devices supports this.
+ */
+class trig_io_mode_iface : public discoverable_feature
+{
+public:
+    using sptr = std::shared_ptr<trig_io_mode_iface>;
+
+    static discoverable_feature::feature_id_t get_feature_id()
+    {
+        return discoverable_feature::TRIG_IO_MODE;
+    }
+
+    std::string get_feature_name() const
+    {
+        return "Trig IO Mode";
+    }
+
+    virtual ~trig_io_mode_iface() = default;
+
+    //! Set the mode for the trig i/o port
+    virtual void set_trig_io_mode(const uhd::trig_io_mode_t mode) = 0;
+};
+
+}} // namespace uhd::features
diff --git a/host/include/uhd/types/trig_io_mode.hpp b/host/include/uhd/types/trig_io_mode.hpp
new file mode 100644
index 000000000..13053e926
--- /dev/null
+++ b/host/include/uhd/types/trig_io_mode.hpp
@@ -0,0 +1,20 @@
+//
+// Copyright 2021 Ettus Research, a National Instruments Brand
+//
+// SPDX-License-Identifier: GPL-3.0-or-later
+//
+
+#pragma once
+
+namespace uhd {
+
+enum class trig_io_mode_t {
+    //! Output PPS signal from port
+    PPS_OUTPUT,
+    //! Use port as input
+    INPUT,
+    //! Port is turned off
+    OFF
+};
+
+} // namespace uhd
diff --git a/host/lib/include/uhdlib/usrp/common/mpmd_mb_controller.hpp b/host/lib/include/uhdlib/usrp/common/mpmd_mb_controller.hpp
index e7498b9f5..2d751a4e5 100644
--- a/host/lib/include/uhdlib/usrp/common/mpmd_mb_controller.hpp
+++ b/host/lib/include/uhdlib/usrp/common/mpmd_mb_controller.hpp
@@ -7,10 +7,11 @@
 #pragma once
 
 #include <uhd/features/ref_clk_calibration_iface.hpp>
+#include <uhd/features/trig_io_mode_iface.hpp>
 #include <uhd/rfnoc/mb_controller.hpp>
-#include <uhdlib/usrp/common/rpc.hpp>
 #include <uhdlib/features/discoverable_feature_registry.hpp>
 #include <uhdlib/features/fpga_load_notification_iface.hpp>
+#include <uhdlib/usrp/common/rpc.hpp>
 #include <uhdlib/utils/rpc.hpp>
 #include <memory>
 
@@ -155,8 +156,22 @@ public:
         uhd::usrp::mpmd_rpc_iface::sptr _rpcc;
     };
 
+    class trig_io_mode : public uhd::features::trig_io_mode_iface
+    {
+    public:
+        using sptr = std::shared_ptr<trig_io_mode>;
+
+        trig_io_mode(uhd::usrp::mpmd_rpc_iface::sptr rpcc);
+
+        void set_trig_io_mode(const uhd::trig_io_mode_t mode) override;
+
+    private:
+        uhd::usrp::mpmd_rpc_iface::sptr _rpcc;
+    };
+
     fpga_onload::sptr _fpga_onload;
     ref_clk_calibration::sptr _ref_clk_cal;
+    trig_io_mode::sptr _trig_io_mode;
 };
 
 }} // namespace uhd::rfnoc
diff --git a/host/lib/usrp/mpmd/mpmd_mb_controller.cpp b/host/lib/usrp/mpmd/mpmd_mb_controller.cpp
index 665a38152..b79abcee0 100644
--- a/host/lib/usrp/mpmd/mpmd_mb_controller.cpp
+++ b/host/lib/usrp/mpmd/mpmd_mb_controller.cpp
@@ -52,6 +52,28 @@ void mpmd_mb_controller::ref_clk_calibration::store_ref_clk_tuning_word(uint32_t
     _rpcc->store_ref_clk_tuning_word(tuning_word);
 }
 
+mpmd_mb_controller::trig_io_mode::trig_io_mode(uhd::usrp::mpmd_rpc_iface::sptr rpcc)
+    : _rpcc(rpcc)
+{
+}
+
+void mpmd_mb_controller::trig_io_mode::set_trig_io_mode(const uhd::trig_io_mode_t mode)
+{
+    switch (mode) {
+        case uhd::trig_io_mode_t::PPS_OUTPUT:
+            _rpcc->set_trigger_io("pps_output");
+            break;
+        case uhd::trig_io_mode_t::INPUT:
+            _rpcc->set_trigger_io("input");
+            break;
+        case uhd::trig_io_mode_t::OFF:
+            _rpcc->set_trigger_io("off");
+            break;
+        default:
+            throw uhd::value_error("set_trig_io_mode: Requested mode is invalid.");
+    }
+}
+
 mpmd_mb_controller::mpmd_mb_controller(
     uhd::usrp::mpmd_rpc_iface::sptr rpcc, uhd::device_addr_t device_info)
     : _rpc(rpcc), _device_info(device_info)
@@ -79,6 +101,11 @@ mpmd_mb_controller::mpmd_mb_controller(
         _ref_clk_cal = std::make_shared<ref_clk_calibration>(_rpc);
         register_feature(_ref_clk_cal);
     }
+
+    if (_rpc->supports_feature("trig_io_mode")) {
+        _trig_io_mode = std::make_shared<trig_io_mode>(_rpc);
+        register_feature(_trig_io_mode);
+    }
 }
 
 /******************************************************************************
diff --git a/mpm/python/usrp_mpm/periph_manager/x4xx.py b/mpm/python/usrp_mpm/periph_manager/x4xx.py
index 4dd1a290b..c4df552dd 100644
--- a/mpm/python/usrp_mpm/periph_manager/x4xx.py
+++ b/mpm/python/usrp_mpm/periph_manager/x4xx.py
@@ -214,7 +214,7 @@ class x4xx(ZynqComponents, PeriphManagerBase):
             'reset': False,
         },
     }
-    discoverable_features = ["ref_clk_calibration", "time_export"]
+    discoverable_features = ["ref_clk_calibration", "time_export", "trig_io_mode"]
     #
     # End of overridables from PeriphManagerBase
     ###########################################################################