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* b200: Fix invalid RF switch positionsUHD-4.4michael-west2023-05-102-11/+13
| | | | | | | | | In some situations, the RF switches on the frontend would be placed in undefined states. This does not cause physical harm, but could distort signals or introduce noise. This fix ensures the RF switches are always in a defined state. Signed-off-by: michael-west <michael.west@ettus.com>
* octoclock: Fix uhd_usrp_probe errormichael-west2023-05-102-10/+13
| | | | | | | | | | | Running the uhd_usrp_probe utility was resulting in an error due to type mismatch between the utility and the data type in the property tree. The data type has been made consistent for all utilities and underlying implementation code as a mboard_eeprom_t. This reverts "octoclock: Fix type of eeprom object in property_tree". Signed-off-by: michael-west <michael.west@ettus.com>
* cmake: Fix auto-detection of Python install directoryMartin Braun2023-05-101-2/+22
| | | | | | | | | | | | | | | This fixes an issue where on Ubuntu 22.04 (with Python 3.10), the installation of the Python module would go to $PREFIX/local/lib even if the rest goes to $PREFIX/lib. We achieve this by avoiding a) using sysconfig.get_path() to get *both* the prefix and the library path, and then also avoiding the `posix_local` install scheme. Note: This same logic fails to work for MPM, so we don't touch that, but simply force MPM to use the same path as UHD has. This means MPM is unaffected when built by itself, but follows the UHD path when built as part of UHD. Hat-tip to Johannes Demel for pointing out this solution path.
* extension: windows: Fixed linking extension example to uhd.libmkoop2023-05-102-17/+39
| | | | | Symtom to observed Example of how to use a (new) feature/behavior
* lib: rfnoc: Fix logic in can_connect_device_to_device()Martin Braun2023-05-102-2/+16
| | | | | | | | | | | | This fixes an issue in link_stream_manager::can_connect_device_to_device() where the return value is true for any valid connection, not just the connections that are configurable for this link_stream_manager instance. This bug has the effect of breaking some multi-usrp connection scenarios. Co-Authored-By: Virendra Kakade <virendra.kakade@ni.com>
* utils: Fix usrp2_recovery.py for Python3Martin Braun2023-05-101-13/+23
| | | | | The script was using invalid string/binary string conversions with Python3. Also, it was moved from optparse to argparse.
* UBX: Add VCO band calibration and map accessmichael-west2023-05-103-88/+433
| | | | | | | | | | The LO for the UBX can fail to lock in some cases where timed commands are used to tune. The LOs on the UBX use a map to select the VCO band. These changes give access to the maps for each LO and add a calibration for the maps. This allows users to develop a calibration that suits their use case. Signed-off-by: michael-west <michael.west@ettus.com>
* rfnoc: Fix disconnecting back-edges from graphsMartin Braun2023-05-102-2/+99
| | | | | | | | | | | | | | | | | | | | | This fixes a bug where calling rfnoc_graph::disconnect() fails when the edge is not a forward edge, because the code would try and find an edge to remove that was a forward edge, even if source/destination ports would match. Error was discovered during use of X410_X4_400 image. The prevented the following use case: - Stream data from host to Replay Block - FDx Play and Record data via radio from/to replaz block - Stream recorded data from replay block to host The FDx use case requires one connection to be marked as back-edge (not is_forward_edge). The X410_X4_400 fpga does not include DDC/DUC block and the Radio and Replay blocks are directly connected to each other. To enable streaming data back to the host the required back-edge connecting needs to be disconnected. Commit also adds 2 additional rfnoc units tests modeling this use case w/o (X410_X4_400) and with (all 200MHz images) DDC/DUC blocks.
* rfnoc: Make edge comparison more flexibleMartin Braun2023-05-101-12/+22
| | | | | | | | | | | | | | | This allows to compare graph edges without also comparing their properties. If an edge goes from node A, port X to node B, port Y, then it might also carry properties (e.g., is it a back-edge) that may not be relevant for the comparison. This is relevant when finding edges that should be removed (e.g., in a disconnect() call). The way this change is implemented it doesn't break existing code. There is a new API call graph_edge_t::is_equal() which can take a new flag to make comparisons more or less strict. The existing operator==() is unchanged in behaviour. Co-authored-by: Marian Koop <marian.koop@ni.com>
* ci: update to consume correct branch for docker build pipelineMatthew Crymble2023-04-262-1/+13
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* fpga: Additional comment cleanupAki Tomita2023-03-031-2/+0
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* fpga: Delete extra comment lineAki Tomita2023-03-031-1/+0
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* tools: Remove fpga directory from Debian buildmichael-west2023-03-031-1/+1
| | | | Signed-off-by: michael-west <michael.west@ettus.com>
* tools: Update upload_debs.sh scriptmichael-west2023-03-031-7/+15
| | | | | | | | | | | The previous version would create a symbolic link to the current UHD directory and then create a tarball excluding all the files that would cause issues for Debian, but it did not exclude those same files when doing the debuild. These changes create a separate directory and copy the necessary files into it so that the tarball and debuild use exactly the same set of files. Also added exclusion of MSVC files. Signed-off-by: michael-west <michael.west@ettus.com>
* debian: Fix copyright dates in changelogmichael-west2023-03-031-63/+70
| | | | Signed-off-by: michael-west <michael.west@ettus.com>
* fpga: Reformat javascript in docmichael-west2023-03-031-10/+644
| | | | | | | The long lines were causing Debian lintian failures, so they have been reformatted. No functional changes. Signed-off-by: michael-west <michael.west@ettus.com>
* fpga: Add BUILD_BASE_DIR option to makefilesWade Fife2023-03-038-22/+35
| | | | | | | | | | Adds a BUILD_BASE_DIR makefile variable that allows you to specify the base directory for FPGA build outputs. This allows you to put the output from each run of make into a unique directory, or to run multiple instances of make in parallel with each build's output being put in a different directory. For example: make X310_XG BUILD_BASE_DIR=/path/to/builds
* rfnoc: Demote some de-init DEBUG messagesMartin Braun2023-03-031-2/+2
| | | | | | | | | | The following type of DEBUG log messages are demoted to TRACE: [DEBUG] [0/DDC#1] deinit() called, but not implemented. [DEBUG] [0/DDC#1] Invalidating register interface These are harmless messages, and they aren't necessary to show users at DEBUG level.
* mpm: Fix test utilitiesMartin Braun2023-03-031-10/+10
| | | | | | - Fix MockGpiod object: This class should mock the gpiod module, but it was missing the LINE_REQ_EV_FALLING_EDGE attribute. - While we're at it, fix some pylint warnings.
* test: add delayed streaming start argsVirendra Kakade2023-03-031-0/+2
| | | | | | | | Add support for the "tx_delay" and "rx_delay" benchmark_rate args to run_benchmark_rate.py to enable batch runs of benchmark_rate using those arguments. Signed-off-by: Virendra Kakade <virendra.kakade@ni.com>
* MPM: fix GPS lock sensor method nameVolkan Öz2023-03-031-1/+1
| | | | | | | | | | | | | Method to get the lock status of the GPS sensor should be get_gps_lock_sensor instead of get_gps_locked_sensor Changing this conforms the x4xx with other USRPs and also makes the call in get_gps_sensor_status executable at all.
* fpga: ci: Use repeat_fpga_build for pipeline buildsWade Fife2023-03-033-4/+10
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* fpga: tools: Add repeat_fpga_build.pyWade Fife2023-03-031-0/+163
| | | | | This script allows you to repeatedly run an FPGA build until it successfully meets timing.
* fpga: Add BUILD_SEED variableWade Fife2023-03-0315-61/+221
| | | | | | | | | | | | | | Adds a BUILD_SEED make variable that can be set to a 32-bit integer, and adds an FPGA read-only register initialized by this variable. Changing this variable will randomly affect the FPGA build results. This can be useful when your build fails timing by a small amount, allowing you to build again and get different results with the same code. For example, you could run the following to produce an FPGA build with different timing results from the default build: make X310_XG BUILD_SEED=123
* ci: Remove Fedora 35 and add Fedora 37Matthew Crymble2023-03-032-5/+5
| | | | Fedora 35 is EOL and Fedora 37 has been released
* examples: Fix play region in replay_capture.pyWade Fife2023-03-031-21/+35
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* docs: Fix docstring for get_block_chain()Martin Braun2023-03-031-1/+1
| | | | | The source_chain parameter was incorrectly documented. Shoutouts to Github user JerthG for pointing this out.
* examples: rx_samples_to_file: multi_streamer optionAdam Vander Pas2023-03-031-92/+164
| | | | | | Add 'multi_streamer' command line parameter to enable using a additional thread for each channel used in the example run.
* docs: Fix argument for uhd_image_loader in E3xx docsMartin Braun2023-03-031-1/+1
| | | | Hat-tip to Github user michaeldbrandt for pointing this out.
* rfnoc: radio: Always prefer register-based time accessMartin Braun2023-03-031-2/+4
| | | | | | | | | | | | | The radio blocks have a feature to read back the current time via a CHDR register access, but in the case where we are restarting a stream after an overrun, we are still query the MB controller for the time instead of of using that register. This has two problems: - The register access is much faster on MPM devices, where querying the MB controller requires an additional RPC call. - On newer devices, there is no guarantee that timekeeper 0 is actually the one that is providing the time (but we make this assumption here). Reading from the radio's own time registers is always correct if the FPGA bitfile was configured correctly.
* mpm: mpmutils: Add parse_multi_device_arg() functionMartin Braun2023-03-031-0/+41
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* mpm: mpmutils: Fix Pylint warningMartin Braun2023-03-031-1/+1
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* ci: increase build timeouts to 90 minutesMatthew Crymble2023-03-034-0/+4
| | | | | The UHD build and UHD installer build jobs would sometimes exceed the default timeout of 60 minutes.
* UHD 4.4.0.0 Releasev4.4.0.0michael-west2023-01-275-120/+109
| | | | Signed-off-by: michael-west <michael.west@ettus.com>
* images: Fix checksum for X410 FPGA imagev4.4.0.0-rc1michael-west2023-01-261-1/+1
| | | | Signed-off-by: michael-west <michael.west@ettus.com>
* Prepare branch for 4.4.0.0 releasemichael-west2023-01-237-36/+230
| | | | | | | | | - Updated version string - Updated CHANGELOG - Updated Debian-related files - Updated images Signed-off-by: michael-west <michael.west@ettus.com>
* fpga: Update copyrightmichael-west2023-01-196-0/+6
| | | | | | Update copyright on recently changed files. Signed-off-by: michael-west <michael.west@ettus.com>
* FPGA: Fix overflows in DDCmichael-west2023-01-191-12/+54
| | | | | | | Added proper clipping of halfband filter output to handle potential overflow. Signed-off-by: michael-west <michael.west@ettus.com>
* FPGA: Restore FIR filter in rx_frontend_gen3michael-west2023-01-197-32/+73
| | | | | | | | | The FIR filter applied gain. Removing it caused incorrect scaling and signals where every other sample was zero. Also parameterized heterodyne frontend processing so it would not use resources in images not requiring it. Signed-off-by: michael-west <michael.west@ettus.com>
* FPGA: Fix warnings in dds_freq_tune modulemichael-west2023-01-191-1/+3
| | | | | | Added missing tuser connections. Signed-off-by: michael-west <michael.west@ettus.com>
* tests: add x310 raw udp testsVirendra Kakade2023-01-172-3/+22
| | | | | | Adds tests for X310 10GBE interface. Signed-off-by: Virendra Kakade <virendra.kakade@ni.com>
* e3xx: add support for power calibration apiDavid Raeman2023-01-174-0/+116
| | | | | | | This commit adds support for the UHD power calibration API on the E3xx family of radios. It also updates the documentation to reflect this support, and it adds support to the uhd_power_cal.py utility by adding a "calibrator" subclass for E3xx radios.
* fpga: rfnoc: Add align_samples testbenchLarissa Phillip2023-01-123-0/+513
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* Fix build with GCC 13 (add missing <cstdint> include)Sam James2023-01-127-0/+7
| | | | | | | | | | | | | | | | | | GCC 13 (as usual for new compiler releases) shuffles around some internal includes and so <cstdint> is no longer transitively included. Explicitly include <cstdint> for uint8_t. ``` /var/tmp/portage/net-wireless/uhd-4.3.0.0/work/uhd-4.3.0.0/host/include/uhd/rfnoc/defaults.hpp:43:14: error: 'uint32_t' does not name a type 43 | static const uint32_t DEFAULT_NOC_ID = 0xFFFFFFFF; | ^~~~~~~~ /var/tmp/portage/net-wireless/uhd-4.3.0.0/work/uhd-4.3.0.0/host/include/uhd/rfnoc/defaults.hpp:1:1: note: 'uint32_t' is defined in header '<cstdint>'; did you forget to '#include <cstdint>'? +++ |+#include <cstdint> 1 | // ``` Signed-off-by: Sam James <sam@gentoo.org>
* manifest: Update FPGA imagesmichael-west2023-01-111-13/+13
| | | | | | Update FPGA images for B2xx, E3xx, X3xx, N3xx, and X4xx Signed-off-by: michael-west <michael.west@ettus.com>
* docs: Update manual for X3x0 raw UDP streamingMartin Braun2023-01-112-1/+27
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* x300: Enable use of advanced transport adaptersMartin Braun2023-01-104-20/+135
| | | | | | | | | | | This instantiates xport_adapter_ctrl objects in the x300_mb_iface, which allows the X300 to support the get_chdr_xport_adapters() and add_remote_ep_route() API calls. Effectively, this enables remote UDP streaming for X300 devices, provided they have been updated to FPGA compat number 7.3, which adds those features. Co-authored-by: Virendra Kakade <virendra.kakade@ni.com> Co-authored-by: Wade Fife <wade.fife@ni.com>
* usrp: Add xport_adapter_ctrl coreMartin Braun2023-01-105-0/+479
| | | | | | | | | This allows accessing the advanced transport adapter capabilities on X300, where there is no MPM to aid accessing it. It is functionally equivalent to xport_adapter_ctrl.py. Includes unit tests. Co-authored-by: Virendra Kakade <virendra.kakade@ni.com>
* x300: Respect X300_FW_COMMS_FLAGS_ARP_FAIL flagMartin Braun2023-01-101-0/+4
| | | | | In firmware version 6.1, this flag was introduced to indicate a failed ARP lookup.
* x300: Update firmware for TA controlMartin Braun2023-01-106-869/+824
| | | | | | | | | | | | | | | | | | | | - Bump firmware compat to 6.1 - Remove crossbar counter logic (the FPGA does *not* support crossbar counters anymore, so we remove it from the firmware as well) - Remove crossbar programming control (this is now provided by RFNoC management packets) - Remove UDP framing control (this is also provided by RFNoC management packets) - Remove Ethernet link/activity LED control (this has been handled by the FPGA directly for years now) - Add functionality to program transport adapter. The TA is programmed directly on the settings bus, so for the most part, this is already possible from the firmware. The only exception is the 'virtual' register to program IP address and MAC at the same time. In the firmware, it will perform an ARP lookup of the MAC address, and then write the "normal" IPv4 address register in the TA, as well as the MAC address registers. - Updated bootram.coe
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