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| author |   Marek Vasut <marex@denx.de> | 2024-06-25 14:11:09 +0200 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2024-07-01 22:21:46 +0800 |
| commit | 037ee58e0ae5bc48e770c2256dc06d6a82ade428 (patch) | |
| tree | cc6da94ad9bc3712ea5099757963b871d4e26cb4 | |
| parent | arm64: dts: layerscape: rename b(q)man-portals to b(q)man-portals-bus (diff) | |
| download | wireguard-linux-037ee58e0ae5bc48e770c2256dc06d6a82ade428.tar.xz wireguard-linux-037ee58e0ae5bc48e770c2256dc06d6a82ade428.zip | |
arm64: dts: imx8mp: Do not reconfigure Audio PLL2 on DH i.MX8M Plus DHCOM SoM
The DH i.MX8M Plus DHCOM SoM uses Audio PLL2 to supply clock to CLKOUT2
output. Those clock are used to supply on-SoM TC9595 DSI-to-(e)DP bridge
with RefClk and must not be reconfigured, otherwise the bridge cannot
work correctly. Stop reconfiguring Audio PLL2 on this SoM.
Fixes: f560da940e32 ("arm64: dts: imx8mp: Initialize audio PLLs from audiomix subsystem")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi index f5115f9e8c47..a1b77d57a906 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi @@ -78,6 +78,11 @@ cpu-supply = <&buck2>; }; +&audio_blk_ctrl { + assigned-clocks = <&clk IMX8MP_AUDIO_PLL1>; + assigned-clock-rates = <393216000>; +}; + &ecspi1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1>; |