diff options
| author |   Mikita Lipski <mikita.lipski@amd.com> | 2020-06-01 10:26:11 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-07-01 01:59:25 -0400 |
| commit | 03ca960098d227e09e83f09e75e5fdbba48a7187 (patch) | |
| tree | a7cee939896f93fedfb27c8669679eadfc063e39 | |
| parent | drm/amd/display: [FW Promotion] Release 1.0.16 (diff) | |
| download | wireguard-linux-03ca960098d227e09e83f09e75e5fdbba48a7187.tar.xz wireguard-linux-03ca960098d227e09e83f09e75e5fdbba48a7187.zip | |
drm/amd/display: Fix calculation of virtual channel payload
[why]
The calculation of virtual channel payload would not take link settings
in account. As we calculate VCPI slots needed both PBN for stream and
also PBN per time slot. Before we would use generic PBN per time slot,
which would not change with link settings causing wrong Payload
allocation.
[how]
Provide PBN per time slot for each Virtual channel payload calculation.
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 19 |
2 files changed, 10 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 7094c3b2c4f7..991516e5c6cc 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -5452,7 +5452,7 @@ static int dm_encoder_helper_atomic_check(struct drm_encoder *encoder, mst_mgr, mst_port, dm_new_connector_state->pbn, - 0); + dm_mst_get_pbn_divider(aconnector->dc_link)); if (dm_new_connector_state->vcpi_slots < 0) { DRM_DEBUG_ATOMIC("failed finding vcpi slots: %d\n", (int)dm_new_connector_state->vcpi_slots); return dm_new_connector_state->vcpi_slots; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c index ae0a7ef1d595..cf15248739f7 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -522,6 +522,8 @@ static void increase_dsc_bpp(struct drm_atomic_state *state, int link_timeslots_used; int fair_pbn_alloc; + pbn_per_timeslot = dm_mst_get_pbn_divider(dc_link); + for (i = 0; i < count; i++) { if (vars[i].dsc_enabled) { initial_slack[i] = kbps_to_peak_pbn(params[i].bw_range.max_kbps) - vars[i].pbn; @@ -533,9 +535,6 @@ static void increase_dsc_bpp(struct drm_atomic_state *state, } } - pbn_per_timeslot = dc_link_bandwidth_kbps(dc_link, - dc_link_get_link_cap(dc_link)) / (8 * 1000 * 54); - while (remaining_to_increase) { next_index = -1; min_initial_slack = -1; @@ -564,7 +563,7 @@ static void increase_dsc_bpp(struct drm_atomic_state *state, params[next_index].port->mgr, params[next_index].port, vars[next_index].pbn, - dm_mst_get_pbn_divider(dc_link)) < 0) + pbn_per_timeslot) < 0) return; if (!drm_dp_mst_atomic_check(state)) { vars[next_index].bpp_x16 = bpp_x16_from_pbn(params[next_index], vars[next_index].pbn); @@ -574,7 +573,7 @@ static void increase_dsc_bpp(struct drm_atomic_state *state, params[next_index].port->mgr, params[next_index].port, vars[next_index].pbn, - dm_mst_get_pbn_divider(dc_link)) < 0) + pbn_per_timeslot) < 0) return; } } else { @@ -583,7 +582,7 @@ static void increase_dsc_bpp(struct drm_atomic_state *state, params[next_index].port->mgr, params[next_index].port, vars[next_index].pbn, - dm_mst_get_pbn_divider(dc_link)) < 0) + pbn_per_timeslot) < 0) return; if (!drm_dp_mst_atomic_check(state)) { vars[next_index].bpp_x16 = params[next_index].bw_range.max_target_bpp_x16; @@ -593,7 +592,7 @@ static void increase_dsc_bpp(struct drm_atomic_state *state, params[next_index].port->mgr, params[next_index].port, vars[next_index].pbn, - dm_mst_get_pbn_divider(dc_link)) < 0) + pbn_per_timeslot) < 0) return; } } @@ -647,7 +646,7 @@ static void try_disable_dsc(struct drm_atomic_state *state, params[next_index].port->mgr, params[next_index].port, vars[next_index].pbn, - 0) < 0) + dm_mst_get_pbn_divider(dc_link)) < 0) return; if (!drm_dp_mst_atomic_check(state)) { @@ -718,7 +717,7 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state, params[i].port->mgr, params[i].port, vars[i].pbn, - 0) < 0) + dm_mst_get_pbn_divider(dc_link)) < 0) return false; } if (!drm_dp_mst_atomic_check(state)) { @@ -746,7 +745,7 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state, params[i].port->mgr, params[i].port, vars[i].pbn, - 0) < 0) + dm_mst_get_pbn_divider(dc_link)) < 0) return false; } } |