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| author |   Apelete Seketeli <aseketeli@baylibre.com> | 2023-08-10 01:16:22 +0530 |
|---|---|---|
| committer |   Nishanth Menon <nm@ti.com> | 2023-08-09 22:28:32 -0500 |
| commit | 05a1f130101e7a49ff1e8734939facd43596ea26 (patch) | |
| tree | 51c281bd6221364da629a2c8910e66fc021158ec | |
| parent | arm64: dts: ti: k3: Add cfg reg region to ringacc node (diff) | |
| download | wireguard-linux-05a1f130101e7a49ff1e8734939facd43596ea26.tar.xz wireguard-linux-05a1f130101e7a49ff1e8734939facd43596ea26.zip | |
arm64: dts: ti: k3-j784s4: Fix interrupt ranges for wkup & main gpio
This patch fixes the interrupt range for wakeup and main domain gpio
interrupt routers. They were wrongly subtracted by 32 instead of
following what is defined in the interrupt map in the TRM (Table 9-35).
Link: http://www.ti.com/lit/pdf/spruj52
Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
Signed-off-by: Apelete Seketeli <aseketeli@baylibre.com>
Signed-off-by: Esteban Blanc <eblanc@baylibre.com>
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Link: https://lore.kernel.org/r/20230810-tps6594-v6-4-2b2e2399e2ef@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index 29adf3c6a70d..1b927dbdcc5c 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -60,7 +60,7 @@ #interrupt-cells = <1>; ti,sci = <&sms>; ti,sci-dev-id = <10>; - ti,interrupt-ranges = <8 360 56>; + ti,interrupt-ranges = <8 392 56>; }; main_pmx0: pinctrl@11c000 { diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index 42709489c5d1..920d5b5f1b75 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -107,7 +107,7 @@ #interrupt-cells = <1>; ti,sci = <&sms>; ti,sci-dev-id = <177>; - ti,interrupt-ranges = <16 928 16>; + ti,interrupt-ranges = <16 960 16>; }; /* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */ |