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author | 2025-04-14 12:01:13 +0200 | |
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committer | 2025-05-08 20:23:32 +0200 | |
commit | 06534edc0d366b9904c221de77068616d7b5af32 (patch) | |
tree | cf6828732a1b4d645aee79182ec31d5e328878ab | |
parent | arm64: dts: renesas: r9a09g047e57-smarc: Enable CAN Transceiver (diff) | |
download | wireguard-linux-06534edc0d366b9904c221de77068616d7b5af32.tar.xz wireguard-linux-06534edc0d366b9904c221de77068616d7b5af32.zip |
ARM: dts: renesas: r9a06g032-rzn1d400-eb: Add GMAC1 port
This port bypasses the switch and is directly connected to the GMAC.
Co-developed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250414100206.7185-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r-- | arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts index e539df514d1e..7f721720f647 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts @@ -15,6 +15,44 @@ "renesas,r9a06g032"; }; +&gmac1 { + pinctrl-0 = <&pins_eth0>, <&pins_mdio0>; + pinctrl-names = "default"; + + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <&phy_mii0>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy_mii0: ethernet-phy@8 { + reg = <8>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@1 { + reg = <1>; + color = <LED_COLOR_ID_ORANGE>; + function = LED_FUNCTION_ACTIVITY; + default-state = "keep"; + }; + }; + }; + }; +}; + &i2c2 { /* Sensors are different across revisions. All are LM75B compatible */ sensor@49 { @@ -23,6 +61,11 @@ }; }; +&mii_conv1 { + renesas,miic-input = <MIIC_GMAC1_PORT>; + status = "okay"; +}; + &mii_conv2 { renesas,miic-input = <MIIC_SWITCH_PORTD>; status = "okay"; @@ -34,6 +77,23 @@ }; &pinctrl { + pins_eth0: pins-eth0 { + pinmux = <RZN1_PINMUX(0, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, + <RZN1_PINMUX(1, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, + <RZN1_PINMUX(2, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, + <RZN1_PINMUX(3, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, + <RZN1_PINMUX(4, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, + <RZN1_PINMUX(5, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, + <RZN1_PINMUX(6, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, + <RZN1_PINMUX(7, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, + <RZN1_PINMUX(8, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, + <RZN1_PINMUX(9, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, + <RZN1_PINMUX(10, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, + <RZN1_PINMUX(11, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>; + drive-strength = <6>; + bias-disable; + }; + pins_eth1: pins-eth1 { pinmux = <RZN1_PINMUX(12, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, <RZN1_PINMUX(13, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>, @@ -68,6 +128,11 @@ bias-disable; }; + pins_mdio0: pins-mdio0 { + pinmux = <RZN1_PINMUX(150, RZN1_FUNC_MDIO0_GMAC0)>, + <RZN1_PINMUX(151, RZN1_FUNC_MDIO0_GMAC0)>; + }; + pins_sdio1: pins-sdio1 { pinmux = <RZN1_PINMUX(95, RZN1_FUNC_SDIO)>, <RZN1_PINMUX(97, RZN1_FUNC_SDIO)>, |