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| author |   Tomi Valkeinen <tomi.valkeinen@ti.com> | 2020-04-22 12:15:12 +0300 |
|---|---|---|
| committer |   Tero Kristo <t-kristo@ti.com> | 2020-04-27 13:01:12 +0300 |
| commit | 0836dacecf48a4fef6e625d4f64f9dea3a2aab8d (patch) | |
| tree | 1412e2967d8a96d508cf912f6abbbb7e1020f157 | |
| parent | arm64: dts: ti: k3-j721e-main: Add DSS node (diff) | |
| download | wireguard-linux-0836dacecf48a4fef6e625d4f64f9dea3a2aab8d.tar.xz wireguard-linux-0836dacecf48a4fef6e625d4f64f9dea3a2aab8d.zip | |
arm64: dts: ti: k3-j721e-common-proc-board: add assigned clks for DSS
The DSS related clock muxes are set via assigned-clocks in a way which
provides us:
VP0 - DisplayPort SST
VP1 - DPI0
VP2 - DSI
VP3 - DPI1
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 98e5e17e3ff7..6df823aaa37c 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -472,3 +472,23 @@ phy-mode = "rgmii-rxid"; phy-handle = <&phy0>; }; + +&dss { + /* + * These clock assignments are chosen to enable the following outputs: + * + * VP0 - DisplayPort SST + * VP1 - DPI0 + * VP2 - DSI + * VP3 - DPI1 + */ + + assigned-clocks = <&k3_clks 152 1>, + <&k3_clks 152 4>, + <&k3_clks 152 9>, + <&k3_clks 152 13>; + assigned-clock-parents = <&k3_clks 152 2>, /* PLL16_HSDIV0 */ + <&k3_clks 152 6>, /* PLL19_HSDIV0 */ + <&k3_clks 152 11>, /* PLL18_HSDIV0 */ + <&k3_clks 152 18>; /* PLL23_HSDIV0 */ +}; |