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| author |   Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | 2021-12-27 14:35:49 +0100 |
|---|---|---|
| committer |   Dinh Nguyen <dinguyen@kernel.org> | 2022-02-09 10:43:02 -0600 |
| commit | 0d108c397005f533a56528de792978676a51a0ac (patch) | |
| tree | 349a56cce8313d2cd1bda9fa9f7acfe72d287ea6 | |
| parent | dt-bindings: clock: intel,stratix10: convert to dtschema (diff) | |
| download | wireguard-linux-0d108c397005f533a56528de792978676a51a0ac.tar.xz wireguard-linux-0d108c397005f533a56528de792978676a51a0ac.zip | |
ARM: dts: arria5: add board compatible for SoCFPGA DK
The Altera SoCFPGA Arria V SoC Development Kit is a board with Arria 5,
so it needs its own compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria5_socdk.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts index 1b02d46496a8..0e03011d0247 100644 --- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts @@ -7,7 +7,7 @@ / { model = "Altera SOCFPGA Arria V SoC Development Kit"; - compatible = "altr,socfpga-arria5", "altr,socfpga"; + compatible = "altr,socfpga-arria5-socdk", "altr,socfpga-arria5", "altr,socfpga"; chosen { bootargs = "earlyprintk"; |