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authorZhengqiao Xia <xiazhengqiao@huaqin.corp-partner.google.com>2025-04-29 17:20:30 +0800
committerDouglas Anderson <dianders@chromium.org>2025-04-29 09:20:32 -0700
commit0d607a59a0f6593e72630854a8bcb8b01b8dce40 (patch)
tree2d0aded31d8b3d3b14e07aec371dd83b7ecf46b4
parentdrm/panel-edp: Add support for BOE NE140WUM-N6S panel (diff)
downloadwireguard-linux-0d607a59a0f6593e72630854a8bcb8b01b8dce40.tar.xz
wireguard-linux-0d607a59a0f6593e72630854a8bcb8b01b8dce40.zip
drm/panel-edp: Add support for CSW MNE007QS3-8 panel
CSW MNE007QS3-8 EDID: edid-decode (hex): 00 ff ff ff ff ff ff 00 0e 77 57 14 00 00 00 00 34 22 01 04 a5 1e 13 78 07 ee 95 a3 54 4c 99 26 0f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 cd 7c 80 a0 70 b0 50 40 30 20 26 04 2e bc 10 00 00 1a cd 7c 80 a0 70 b0 50 45 30 20 26 04 2e bc 10 00 00 1a 00 00 00 fd 00 1e 78 9a 9a 20 01 0a 20 20 20 20 20 20 00 00 00 fc 00 4d 4e 45 30 30 37 51 53 33 2d 38 0a 20 01 3f 70 20 79 02 00 21 00 1d c8 0b 5d 07 80 07 b0 04 80 3d 8a 54 cd a4 99 66 62 0f 02 45 54 7c 5d 7c 5d 00 43 12 78 2b 00 0c 27 00 1e 77 00 00 27 00 1e 3b 00 00 2e 00 06 00 43 7c 5d 7c 5d 81 00 20 74 1a 00 00 03 01 1e 78 00 00 5a ff 5a ff 78 00 00 00 00 8d 00 e3 05 04 00 e6 06 01 01 5a 5a ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 76 90 Signed-off-by: Zhengqiao Xia <xiazhengqiao@huaqin.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20250429092030.8025-4-xiazhengqiao@huaqin.corp-partner.google.com
-rw-r--r--drivers/gpu/drm/panel/panel-edp.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c
index 81fc2da94484..90e8c154a978 100644
--- a/drivers/gpu/drm/panel/panel-edp.c
+++ b/drivers/gpu/drm/panel/panel-edp.c
@@ -1762,6 +1762,13 @@ static const struct panel_delay delay_80_500_e50 = {
.enable = 50,
};
+static const struct panel_delay delay_80_500_e80_p2e200 = {
+ .hpd_absent = 80,
+ .unprepare = 500,
+ .enable = 80,
+ .prepare_to_enable = 200,
+};
+
static const struct panel_delay delay_100_500_e200 = {
.hpd_absent = 100,
.unprepare = 500,
@@ -1974,6 +1981,7 @@ static const struct edp_panel_entry edp_panels[] = {
EDP_PANEL_ENTRY('C', 'S', 'W', 0x1103, &delay_200_500_e80_d50, "MNB601LS1-3"),
EDP_PANEL_ENTRY('C', 'S', 'W', 0x1104, &delay_200_500_e50, "MNB601LS1-4"),
EDP_PANEL_ENTRY('C', 'S', 'W', 0x1448, &delay_200_500_e50, "MNE007QS3-7"),
+ EDP_PANEL_ENTRY('C', 'S', 'W', 0x1457, &delay_80_500_e80_p2e200, "MNE007QS3-8"),
EDP_PANEL_ENTRY('E', 'T', 'C', 0x0000, &delay_50_500_e200_d200_po2e335, "LP079QX1-SP0V"),