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| author |   Yann Gautier <yann.gautier@foss.st.com> | 2022-01-12 17:32:21 +0100 |
|---|---|---|
| committer |   Alexandre Torgue <alexandre.torgue@foss.st.com> | 2022-02-07 11:16:27 +0100 |
| commit | 0dbdb4862cd5ddd8c70a2499dc0f3334e81cf823 (patch) | |
| tree | e4adda5c489eb8b8824b644416c9f5d2d9ae36cf | |
| parent | ARM: dts: stm32: update sdmmc slew-rate in stm32mp13 pinctrl (diff) | |
| download | wireguard-linux-0dbdb4862cd5ddd8c70a2499dc0f3334e81cf823.tar.xz wireguard-linux-0dbdb4862cd5ddd8c70a2499dc0f3334e81cf823.zip | |
ARM: dts: stm32: update SDMMC clock slew-rate on STM32MP135F-DK board
Add sdmmc1_clk_pins_a in sdmmc1 pinctrl nodes, to properly manage
clock slew-rate.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
| -rw-r--r-- | arch/arm/boot/dts/stm32mp135f-dk.dts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts index 7e96d9e36217..aae8d3512f4b 100644 --- a/arch/arm/boot/dts/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/stm32mp135f-dk.dts @@ -39,8 +39,8 @@ &sdmmc1 { pinctrl-names = "default", "opendrain"; - pinctrl-0 = <&sdmmc1_b4_pins_a>; - pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>; broken-cd; disable-wp; st,neg-edge; |