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| author |   pengfuyuan <pengfuyuan@kylinos.cn> | 2022-06-16 15:08:03 +0800 |
|---|---|---|
| committer |   Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2022-06-22 07:49:25 +0100 |
| commit | 14d6a086f6b91238873d3363f840a91b3aa062de (patch) | |
| tree | 2eb21528e5f6e4f2c5946c7251afb18e8391f405 | |
| parent | drm/i915: Add global forcewake request to drpc (diff) | |
| download | wireguard-linux-14d6a086f6b91238873d3363f840a91b3aa062de.tar.xz wireguard-linux-14d6a086f6b91238873d3363f840a91b3aa062de.zip | |
drm/i915: Fix spelling typo in comment
Fix spelling typo in comment.
Reported-by: k2ci <kernel-bot@kylinos.cn>
Signed-off-by: pengfuyuan <pengfuyuan@kylinos.cn>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/tencent_7B226C4A9BC2B5EEB37B70C188B5015D290A@qq.com
| -rw-r--r-- | drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c index 80ac0db1ae8c..85518b28cd72 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c @@ -114,7 +114,7 @@ u32 i915_gem_fence_alignment(struct drm_i915_private *i915, u32 size, return i915_gem_fence_size(i915, size, tiling, stride); } -/* Check pitch constriants for all chips & tiling formats */ +/* Check pitch constraints for all chips & tiling formats */ static bool i915_tiling_ok(struct drm_i915_gem_object *obj, unsigned int tiling, unsigned int stride) |