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| author |   Fange Zhang <quic_fangez@quicinc.com> | 2025-01-14 16:55:24 +0800 |
|---|---|---|
| committer |   Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2025-02-25 20:07:44 +0200 |
| commit | 23c0a9d36f78e52b62dcc7623555723cf20ca83c (patch) | |
| tree | 9402b0faffef0ab6f305d91c128947821becc472 | |
| parent | drm/msm/dp: Add support for LTTPR handling (diff) | |
| download | wireguard-linux-23c0a9d36f78e52b62dcc7623555723cf20ca83c.tar.xz wireguard-linux-23c0a9d36f78e52b62dcc7623555723cf20ca83c.zip | |
drm/msm/dpu: Add writeback support for SM6150
On the SM6150 platform there is WB_2 block. Add it to the SM6150 catalog.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Fange Zhang <quic_fangez@quicinc.com>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/632337/
Link: https://lore.kernel.org/r/20250114-add-writeback-support-for-sm6150-v2-1-d707b31aad5c@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h index d761ed705bac..744012892b7c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h @@ -27,6 +27,7 @@ static const struct dpu_mdp_cfg sm6150_mdp = { [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 }, [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 }, [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 }, + [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 }, }, }; @@ -162,6 +163,21 @@ static const struct dpu_pingpong_cfg sm6150_pp[] = { }, }; +static const struct dpu_wb_cfg sm6150_wb[] = { + { + .name = "wb_2", .id = WB_2, + .base = 0x65000, .len = 0x2c8, + .features = WB_SM8250_MASK, + .format_list = wb2_formats_rgb, + .num_formats = ARRAY_SIZE(wb2_formats_rgb), + .clk_ctrl = DPU_CLK_CTRL_WB2, + .xin_id = 6, + .vbif_idx = VBIF_RT, + .maxlinewidth = 2160, + .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4), + }, +}; + static const struct dpu_intf_cfg sm6150_intf[] = { { .name = "intf_0", .id = INTF_0, @@ -242,6 +258,8 @@ const struct dpu_mdss_cfg dpu_sm6150_cfg = { .dspp = sm6150_dspp, .pingpong_count = ARRAY_SIZE(sm6150_pp), .pingpong = sm6150_pp, + .wb_count = ARRAY_SIZE(sm6150_wb), + .wb = sm6150_wb, .intf_count = ARRAY_SIZE(sm6150_intf), .intf = sm6150_intf, .vbif_count = ARRAY_SIZE(sdm845_vbif), |