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| author |   Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-31 12:08:57 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-31 17:13:27 +0000 |
| commit | 24c66274e764de7d5851a35175e6e7ffbce24420 (patch) | |
| tree | 387964d3675bf4b42d70adfb878302f7a8a54e66 | |
| parent | drm/i915/gt: Leave RING_BB_STATE to default value (diff) | |
| download | wireguard-linux-24c66274e764de7d5851a35175e6e7ffbce24420.tar.xz wireguard-linux-24c66274e764de7d5851a35175e6e7ffbce24420.zip | |
drm/i915/gt: Tweak flushes around ivb ppgtt
A small tweak to flush then invalidate appears to improve the
reliability of ppGTT switches on Ivybridge -- but does not improve
hsw/vlv bcs reliability.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191231120857.4014900-1-chris@chris-wilson.co.uk
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_ring_submission.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c index 066c4eddf5d0..48dbe46edbff 100644 --- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c +++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c @@ -1394,7 +1394,7 @@ static int load_pd_dir(struct i915_request *rq, intel_ring_advance(rq, cs); - return 0; + return rq->engine->emit_flush(rq, EMIT_FLUSH); } static inline int mi_set_context(struct i915_request *rq, u32 flags) @@ -1584,7 +1584,7 @@ static int switch_mm(struct i915_request *rq, struct i915_address_space *vm) if (ret) return ret; - return rq->engine->emit_flush(rq, EMIT_FLUSH); + return rq->engine->emit_flush(rq, EMIT_INVALIDATE); } static int switch_context(struct i915_request *rq) |