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| author |   Chen Wang <unicorn_wang@outlook.com> | 2025-02-05 15:01:34 +0800 |
|---|---|---|
| committer |   Inochi Amaoto <inochiama@gmail.com> | 2025-02-08 20:26:49 +0800 |
| commit | 255f83ba5c16b0f79ad0c46c69b2e907012bde83 (patch) | |
| tree | c7ed52437f53b84ab40a4033245a1823d70e51d6 | |
| parent | Linux 6.14-rc1 (diff) | |
| download | wireguard-linux-255f83ba5c16b0f79ad0c46c69b2e907012bde83.tar.xz wireguard-linux-255f83ba5c16b0f79ad0c46c69b2e907012bde83.zip | |
riscv: sophgo: dts: add pwm controller for SG2042 SoC
SG2042 has one PWM controller, which has 4 pwm output channels.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/f376e16c0ee0cdac51bb91421d78defc0601627a.1738737617.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
| -rw-r--r-- | arch/riscv/boot/dts/sophgo/sg2042.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index e62ac51ac55a..4449c762d663 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -165,6 +165,15 @@ }; }; + pwm: pwm@703000c000 { + compatible = "sophgo,sg2042-pwm"; + reg = <0x70 0x3000c000 0x0 0x20>; + #pwm-cells = <3>; + clocks = <&clkgen GATE_CLK_APB_PWM>; + clock-names = "apb"; + resets = <&rstgen RST_PWM>; + }; + pllclk: clock-controller@70300100c0 { compatible = "sophgo,sg2042-pll"; reg = <0x70 0x300100c0 0x0 0x40>; |