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| author |   Michal Simek <michal.simek@amd.com> | 2025-07-22 09:25:40 +0200 |
|---|---|---|
| committer |   Conor Dooley <conor.dooley@microchip.com> | 2025-07-22 21:45:40 +0100 |
| commit | 28fa0dcb571ab8f3be4d919f0e20e01d4e44bcb1 (patch) | |
| tree | c6313086ca47493d2b122c04766ee09ee89b9a3f | |
| parent | riscv: dts: starfive: jh7110-common: add status power led node (diff) | |
| download | wireguard-linux-28fa0dcb571ab8f3be4d919f0e20e01d4e44bcb1.tar.xz wireguard-linux-28fa0dcb571ab8f3be4d919f0e20e01d4e44bcb1.zip | |
dt-bindings: riscv: cpus: Add AMD MicroBlaze V 64bit compatible
32bit version has been added by commit 4a6b93f56296 ("dt-bindings: riscv:
cpus: Add AMD MicroBlaze V compatible") but 64bit version also exists and
should be covered by binding too.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
| -rw-r--r-- | Documentation/devicetree/bindings/riscv/cpus.yaml | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index 2c72f148a74b..1a0cf0702a45 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -45,6 +45,7 @@ properties: - items: - enum: - amd,mbv32 + - amd,mbv64 - andestech,ax45mp - canaan,k210 - sifive,bullet0 |