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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-02-13 18:54:24 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-02-14 21:35:19 +0200 |
| commit | 290248c27c93ad70262b8112595b95ad9d867929 (patch) | |
| tree | 238473eb64cfdfe67f1a16282270a6d61f94a822 | |
| parent | drm/i915: Include "ignore lines" in skl+ wm state (diff) | |
| download | wireguard-linux-290248c27c93ad70262b8112595b95ad9d867929.tar.xz wireguard-linux-290248c27c93ad70262b8112595b95ad9d867929.zip | |
drm/i915: Implement new w/a for underruns with wm1+ disabled
The new workaround from the hw team involves leaving WM1
still disabled but programming the blocks value
identically to WM0, and we also need to set the "ignore
lines watermark" bit for WM1.
v2: Fix commit message wording a bit
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190213165424.22904-3-ville.syrjala@linux.intel.com
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 9485645a41b0..c7ec9b169046 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4463,6 +4463,13 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, for_each_plane_id_on_crtc(intel_crtc, plane_id) { wm = &cstate->wm.skl.optimal.planes[plane_id]; memset(&wm->wm[level], 0, sizeof(wm->wm[level])); + + /* W/A for underruns with WM1+ disabled */ + if (IS_ICELAKE(dev_priv) && + level == 1 && wm->wm[0].plane_en) { + wm->wm[level].plane_res_b = wm->wm[0].plane_res_b; + wm->wm[level].ignore_lines = true; + } } } |