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author | 2020-02-14 10:00:46 -0600 | |
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committer | 2020-04-29 20:37:09 -0700 | |
commit | 2e00dd1bd6567148c331469c60ded9715ac749c7 (patch) | |
tree | eedc795ff2de483c6f1985482a7b7cd2bfad3d81 | |
parent | fpga: machxo2-spi: Use new structure for SPI transfer delays (diff) | |
download | wireguard-linux-2e00dd1bd6567148c331469c60ded9715ac749c7.tar.xz wireguard-linux-2e00dd1bd6567148c331469c60ded9715ac749c7.zip |
dt-bindings: fpga: add compatible value to Stratix10 SoC FPGA manager binding
Add a compatible property value to Stratix10 SoC FPGA manager binding file
Signed-off-by: Richard Gong <richard.gong@intel.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt index 6e03f79287fb..0f874137ca46 100644 --- a/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt +++ b/Documentation/devicetree/bindings/fpga/intel-stratix10-soc-fpga-mgr.txt @@ -4,7 +4,8 @@ Required properties: The fpga_mgr node has the following mandatory property, must be located under firmware/svc node. -- compatible : should contain "intel,stratix10-soc-fpga-mgr" +- compatible : should contain "intel,stratix10-soc-fpga-mgr" or + "intel,agilex-soc-fpga-mgr" Example: |