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| author |   Linus Walleij <linus.walleij@linaro.org> | 2023-09-08 12:49:48 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2023-10-09 22:29:36 +0200 |
| commit | 2ffdee77f0bf5b5de9e7919a4155031ae3346af8 (patch) | |
| tree | 81d09c12d3823832584e4dc4e30675008796283a | |
| parent | ARM: dts: ixp4xx: Add USRobotics USR8200 device tree (diff) | |
| download | wireguard-linux-2ffdee77f0bf5b5de9e7919a4155031ae3346af8.tar.xz wireguard-linux-2ffdee77f0bf5b5de9e7919a4155031ae3346af8.zip | |
ARM: dts: ixp4xx-nslu2: Enable write on flash
To upgrade the firmware and similar, the flash needs write
access.
Link: https://lore.kernel.org/r/20230908-ixp4xx-dts-v1-1-98d36264ed6d@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-nslu2.dts | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-nslu2.dts b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-nslu2.dts index da1e93212b86..706ba531faf0 100644 --- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-nslu2.dts +++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-nslu2.dts @@ -101,6 +101,8 @@ flash@0,0 { compatible = "intel,ixp4xx-flash", "cfi-flash"; bank-width = <2>; + /* Enable writes on the expansion bus */ + intel,ixp4xx-eb-write-enable = <1>; /* * 8 MB of Flash in 0x20000 byte blocks * mapped in at CS0. |