diff options
| author |   Leon Huang <Leon.Huang1@amd.com> | 2023-01-17 14:17:40 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2023-01-31 14:01:45 -0500 |
| commit | 32e3da4310bb1c55b076ed477dea6ddf5a965e69 (patch) | |
| tree | d45457d7880282a85b3ffcb795b045ad9a16f114 | |
| parent | drm/amd/display: Add missing brackets in calculation (diff) | |
| download | wireguard-linux-32e3da4310bb1c55b076ed477dea6ddf5a965e69.tar.xz wireguard-linux-32e3da4310bb1c55b076ed477dea6ddf5a965e69.zip | |
drm/amd/display: Fix only one ABM pipe enabled under ODM combined case
[Why]
ABM set pipe before updating ODM status,
it leads to incorrect ABM pipe setting when enabling ODM combine.
[How]
Call ABM set pipe flow after ODM status update in program pipe sequence.
Reviewed-by: Chun-Liang Chang <Chun-Liang.Chang@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Leon Huang <Leon.Huang1@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index 916dceecd3de..cb8edb14603a 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1777,6 +1777,15 @@ static void dcn20_program_pipe( &pipe_ctx->stream->bit_depth_params, &pipe_ctx->stream->clamping); } + + /* Set ABM pipe after other pipe configurations done */ + if (pipe_ctx->plane_state->visible) { + if (pipe_ctx->stream_res.abm) { + dc->hwss.set_pipe(pipe_ctx); + pipe_ctx->stream_res.abm->funcs->set_abm_level(pipe_ctx->stream_res.abm, + pipe_ctx->stream->abm_level); + } + } } void dcn20_program_front_end_for_ctx( |