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author | 2019-05-06 16:37:40 +0800 | |
---|---|---|
committer | 2019-05-24 12:20:52 -0500 | |
commit | 36f5f8a74981b857596e7eedd424f4573a81c6e9 (patch) | |
tree | 9d9fd975b2341f6e6d9b8338424c48cb65de78cb | |
parent | drm/amd/powerplay: fix Vega10 mclk/socclk voltage link setup (diff) | |
download | wireguard-linux-36f5f8a74981b857596e7eedd424f4573a81c6e9.tar.xz wireguard-linux-36f5f8a74981b857596e7eedd424f4573a81c6e9.zip |
drm/amd/powerplay: valid Vega10 DPMTABLE_OD_UPDATE_VDDC settings V2
With user specified voltage(DPMTABLE_OD_UPDATE_VDDC), the AVFS
will be disabled. However, the buggy code makes this actually not
working as expected.
- V2: clear all OD flags excpet DPMTABLE_OD_UPDATE_VDDC
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c index 138f9f9ea765..05f6bf7d703e 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c @@ -2466,11 +2466,6 @@ static void vega10_check_dpm_table_updated(struct pp_hwmgr *hwmgr) return; } } - - if (data->need_update_dpm_table & DPMTABLE_OD_UPDATE_VDDC) { - data->need_update_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC; - data->need_update_dpm_table |= DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK; - } } /** @@ -3683,6 +3678,10 @@ static int vega10_set_power_state_tasks(struct pp_hwmgr *hwmgr, vega10_update_avfs(hwmgr); + /* + * Clear all OD flags except DPMTABLE_OD_UPDATE_VDDC. + * That will help to keep AVFS disabled. + */ data->need_update_dpm_table &= DPMTABLE_OD_UPDATE_VDDC; return 0; |