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authorAlvin Lee <Alvin.Lee2@amd.com>2024-06-20 14:32:21 -0400
committerAlex Deucher <alexander.deucher@amd.com>2024-08-27 17:51:44 -0400
commit3d054c40766024d9d8fb051d017ceacf2b795f1c (patch)
tree8285f3e69718cd10d976ec1bacd37a5818ea7b01
parentdrm/amd: Introduce additional IPS debug flags (diff)
downloadwireguard-linux-3d054c40766024d9d8fb051d017ceacf2b795f1c.tar.xz
wireguard-linux-3d054c40766024d9d8fb051d017ceacf2b795f1c.zip
drm/amd/display: Don't skip clock updates in overclocking
[Description] Skipping clock updates is not a hard requirement for overclocking and only an optimization. Remove the skip as this can cause issues for FAMS transitions during the overclock sequence. If FAMS is enabled we must disable UCLK switch on any full update (which requires update clocks to be called). Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
index 01ea3a31e54d..8cfc5f435937 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
@@ -1366,9 +1366,6 @@ static void dcn401_update_clocks(struct clk_mgr *clk_mgr_base,
unsigned int num_steps = 0;
- if (dc->work_arounds.skip_clock_update)
- return;
-
if (dc->debug.enable_legacy_clock_update) {
dcn401_update_clocks_legacy(clk_mgr_base, context, safe_to_lower);
return;