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| author |   Lijo Lazar <lijo.lazar@amd.com> | 2023-10-20 12:23:37 +0530 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2023-10-26 19:04:13 -0400 |
| commit | 3f69d5860f5beeb7714922b0c4a653db7d667190 (patch) | |
| tree | ad9d8e2ca7d11830ed545a00c5861fad0df092ec | |
| parent | drm/amd/pm: call smu_cmn_get_smc_version in is_mode1_reset_supported. (diff) | |
| download | wireguard-linux-3f69d5860f5beeb7714922b0c4a653db7d667190.tar.xz wireguard-linux-3f69d5860f5beeb7714922b0c4a653db7d667190.zip | |
drm/amdgpu: Add a read to GFX v9.4.3 ring test
Issue a read to confirm the register write before ringing doorbell. With
multiple XCCs there is chance for race condition.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index 362bf51ab1d2..41bbabd9ad4d 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c @@ -256,6 +256,7 @@ static int gfx_v9_4_3_ring_test_ring(struct amdgpu_ring *ring) xcc_offset = SOC15_REG_OFFSET(GC, 0, regSCRATCH_REG0); scratch_reg0_offset = SOC15_REG_OFFSET(GC, GET_INST(GC, ring->xcc_id), regSCRATCH_REG0); WREG32(scratch_reg0_offset, 0xCAFEDEAD); + tmp = RREG32(scratch_reg0_offset); r = amdgpu_ring_alloc(ring, 3); if (r) |