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authorKanak Shilledar <kanakshilledar@gmail.com>2024-06-12 21:08:43 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2024-06-24 16:10:22 +0200
commit418af7eeb4e187ce6049dc6c611cbc299cc8ec77 (patch)
treed322121166432fdb6a1cea0fe93fb97b7d9fc0b4
parentserial: 8250_platform: Explicitly show we initialise ISA ports only once (diff)
downloadwireguard-linux-418af7eeb4e187ce6049dc6c611cbc299cc8ec77.tar.xz
wireguard-linux-418af7eeb4e187ce6049dc6c611cbc299cc8ec77.zip
dt-bindings: serial: vt8500-uart: convert to json-schema
Convert the VIA VT8500 and WonderMedia WM8xxx UART Controller to newer DT schema. Created DT schema based on the .txt file which had `compatible`, `reg`, `interrupts` and `clocks` as required properties. Additions to the original binding - changed the file name from vt8500-uart to via,vt8500-uart.yaml - removed unnecessary alias from the example. Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com> Acked-by: Alexey Charkov <alchark@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240612153847.52647-2-kanakshilledar@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml46
-rw-r--r--Documentation/devicetree/bindings/serial/vt8500-uart.txt27
2 files changed, 46 insertions, 27 deletions
diff --git a/Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml b/Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml
new file mode 100644
index 000000000000..9c6819241a49
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/via,vt8500-uart.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/via,vt8500-uart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: VIA VT8500 and WonderMedia WM8xxx UART Controller
+
+maintainers:
+ - Alexey Charkov <alchark@gmail.com>
+
+allOf:
+ - $ref: serial.yaml
+
+properties:
+ compatible:
+ enum:
+ - via,vt8500-uart # up to WM8850/WM8950
+ - wm,wm8880-uart # for WM8880 and later
+
+ clocks:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - clocks
+ - interrupts
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ serial@d8200000 {
+ compatible = "via,vt8500-uart";
+ reg = <0xd8200000 0x1040>;
+ interrupts = <32>;
+ clocks = <&clkuart0>;
+ };
diff --git a/Documentation/devicetree/bindings/serial/vt8500-uart.txt b/Documentation/devicetree/bindings/serial/vt8500-uart.txt
deleted file mode 100644
index 2b64e6107fb3..000000000000
--- a/Documentation/devicetree/bindings/serial/vt8500-uart.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* VIA VT8500 and WonderMedia WM8xxx UART Controller
-
-Required properties:
-- compatible: should be "via,vt8500-uart" (for VIA/WonderMedia chips up to and
- including WM8850/WM8950), or "wm,wm8880-uart" (for WM8880 and later)
-
-- reg: base physical address of the controller and length of memory mapped
- region.
-
-- interrupts: hardware interrupt number
-
-- clocks: shall be the input parent clock phandle for the clock. This should
- be the 24Mhz reference clock.
-
-Aliases may be defined to ensure the correct ordering of the uarts.
-
-Example:
- aliases {
- serial0 = &uart0;
- };
-
- uart0: serial@d8200000 {
- compatible = "via,vt8500-uart";
- reg = <0xd8200000 0x1040>;
- interrupts = <32>;
- clocks = <&clkuart0>;
- };