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| author |   Loic Poulain <loic.poulain@linaro.org> | 2020-04-21 14:00:24 +0200 |
|---|---|---|
| committer |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-05-11 16:52:51 -0700 |
| commit | 4a4a26317ec8aba575f6b85789a42639937bc1a4 (patch) | |
| tree | 2b4dba92a53f9ec6ed97903959e4b9620f236938 | |
| parent | arm64: dts: qcom: sc7180: Update Q6V5 MSS node (diff) | |
| download | wireguard-linux-4a4a26317ec8aba575f6b85789a42639937bc1a4.tar.xz wireguard-linux-4a4a26317ec8aba575f6b85789a42639937bc1a4.zip | |
arm64: dts: msm8996: Fix CSI IRQ types
Each IRQ_TYPE_NONE interrupt causes a warning at boot.
Fix that by defining an appropriate type.
Fixes: e0531312e78f ("arm64: dts: qcom: msm8996: Add CAMSS support")
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1587470425-13726-1-git-send-email-loic.poulain@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 895202d07a8b..25380839bc71 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -989,16 +989,16 @@ "csi_clk_mux", "vfe0", "vfe1"; - interrupts = <GIC_SPI 78 0>, - <GIC_SPI 79 0>, - <GIC_SPI 80 0>, - <GIC_SPI 296 0>, - <GIC_SPI 297 0>, - <GIC_SPI 298 0>, - <GIC_SPI 299 0>, - <GIC_SPI 309 0>, - <GIC_SPI 314 0>, - <GIC_SPI 315 0>; + interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>; interrupt-names = "csiphy0", "csiphy1", "csiphy2", |