diff options
| author |   Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2025-03-12 09:34:46 +0000 |
|---|---|---|
| committer |   Paolo Abeni <pabeni@redhat.com> | 2025-03-19 18:06:33 +0100 |
| commit | 50a84bbc7ec10a48348afbf68682fd14dce5321b (patch) | |
| tree | e688fa1e83edc0397a667c8527fcac47fd5c436f | |
| parent | riscv: dts: starfive: remove "snps,en-tx-lpi-clockgating" property (diff) | |
| download | wireguard-linux-50a84bbc7ec10a48348afbf68682fd14dce5321b.tar.xz wireguard-linux-50a84bbc7ec10a48348afbf68682fd14dce5321b.zip | |
ARM: dts: stm32: remove "snps,en-tx-lpi-clockgating" property
Whether the MII transmit clock can be stopped is primarily a property
of the PHY (there is a capability bit that should be checked first.)
Whether the MAC is capable of stopping the transmit clock is a separate
issue, but this is already handled by the core DesignWare MAC code.
As commit "net: stmmac: stm32: use PHY capability for TX clock stop"
adds the flag to use the PHY capability, remove the DT property that is
now unecessary.
Cc: Samin Guo <samin.guo@starfivetech.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1tsIUA-005vGX-8A@rmk-PC.armlinux.org.uk
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp151.dtsi | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi index b9a87fbe971d..0daa8ffe2ff5 100644 --- a/arch/arm/boot/dts/st/stm32mp151.dtsi +++ b/arch/arm/boot/dts/st/stm32mp151.dtsi @@ -1781,7 +1781,6 @@ st,syscon = <&syscfg 0x4>; snps,mixed-burst; snps,pbl = <2>; - snps,en-tx-lpi-clockgating; snps,axi-config = <&stmmac_axi_config_0>; snps,tso; access-controllers = <&etzpc 94>; |