diff options
| author |   Pu Lehui <pulehui@huawei.com> | 2024-01-15 13:12:34 +0000 |
|---|---|---|
| committer |   Daniel Borkmann <daniel@iogearbox.net> | 2024-01-29 16:25:33 +0100 |
| commit | 519fb722bea09ae2664ad21f8ef4360fb799eb2f (patch) | |
| tree | e20f5b0751cd2551f703834bd9be65633771a59c | |
| parent | riscv, bpf: Add necessary Zbb instructions (diff) | |
| download | wireguard-linux-519fb722bea09ae2664ad21f8ef4360fb799eb2f.tar.xz wireguard-linux-519fb722bea09ae2664ad21f8ef4360fb799eb2f.zip | |
riscv, bpf: Optimize sign-extention mov insns with Zbb support
Add 8-bit and 16-bit sign-extention wraper with Zbb support to optimize
sign-extension mov instructions.
Signed-off-by: Pu Lehui <pulehui@huawei.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Tested-by: Björn Töpel <bjorn@rivosinc.com>
Acked-by: Björn Töpel <bjorn@kernel.org>
Link: https://lore.kernel.org/bpf/20240115131235.2914289-6-pulehui@huaweicloud.com
| -rw-r--r-- | arch/riscv/net/bpf_jit.h | 22 | ||||
| -rw-r--r-- | arch/riscv/net/bpf_jit_comp64.c | 5 |
2 files changed, 25 insertions, 2 deletions
diff --git a/arch/riscv/net/bpf_jit.h b/arch/riscv/net/bpf_jit.h index 51f6d214086f..b00c5c0591d2 100644 --- a/arch/riscv/net/bpf_jit.h +++ b/arch/riscv/net/bpf_jit.h @@ -1119,6 +1119,28 @@ static inline void emit_subw(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx) emit(rv_subw(rd, rs1, rs2), ctx); } +static inline void emit_sextb(u8 rd, u8 rs, struct rv_jit_context *ctx) +{ + if (rvzbb_enabled()) { + emit(rvzbb_sextb(rd, rs), ctx); + return; + } + + emit_slli(rd, rs, 56, ctx); + emit_srai(rd, rd, 56, ctx); +} + +static inline void emit_sexth(u8 rd, u8 rs, struct rv_jit_context *ctx) +{ + if (rvzbb_enabled()) { + emit(rvzbb_sexth(rd, rs), ctx); + return; + } + + emit_slli(rd, rs, 48, ctx); + emit_srai(rd, rd, 48, ctx); +} + static inline void emit_sextw(u8 rd, u8 rs, struct rv_jit_context *ctx) { emit_addiw(rd, rs, 0, ctx); diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c index 0a26842535ea..fc1a334e2f70 100644 --- a/arch/riscv/net/bpf_jit_comp64.c +++ b/arch/riscv/net/bpf_jit_comp64.c @@ -1074,9 +1074,10 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx, emit_mv(rd, rs, ctx); break; case 8: + emit_sextb(rd, rs, ctx); + break; case 16: - emit_slli(RV_REG_T1, rs, 64 - insn->off, ctx); - emit_srai(rd, RV_REG_T1, 64 - insn->off, ctx); + emit_sexth(rd, rs, ctx); break; case 32: emit_sextw(rd, rs, ctx); |