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| author |   Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> | 2018-11-19 17:02:39 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-01-14 15:04:33 -0500 |
| commit | 630cb40ffd4a308e98c334cc9f01640a0ccb0aaa (patch) | |
| tree | 5e3010f119a410020556abe1e8fc68d2fa3ff100 | |
| parent | drm/amd/display: Add pixel clock values to dtn logs (diff) | |
| download | wireguard-linux-630cb40ffd4a308e98c334cc9f01640a0ccb0aaa.tar.xz wireguard-linux-630cb40ffd4a308e98c334cc9f01640a0ccb0aaa.zip | |
drm/amd/display: Remove some extra braces
Remove braces around single-line conditionals
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index f001eddd4180..edb382e1eaeb 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -2252,13 +2252,11 @@ static void program_all_pipe_in_tree( } - if (pipe_ctx->plane_state != NULL) { + if (pipe_ctx->plane_state != NULL) dcn10_program_pipe(dc, pipe_ctx, context); - } - if (pipe_ctx->bottom_pipe != NULL && pipe_ctx->bottom_pipe != pipe_ctx) { + if (pipe_ctx->bottom_pipe != NULL && pipe_ctx->bottom_pipe != pipe_ctx) program_all_pipe_in_tree(dc, pipe_ctx->bottom_pipe, context); - } } struct pipe_ctx *find_top_pipe_for_stream( |