diff options
| author |   Radhakrishna Sripada <radhakrishna.sripada@intel.com> | 2022-08-17 15:43:04 -0700 |
|---|---|---|
| committer | Radhakrishna Sripada <radhakrishna.sripada@intel.com> | 2022-08-25 10:59:33 -0700 |
| commit | 6509dd1111928a351204af1fc8e6aa61e0c59002 (patch) | |
| tree | 82f6fec430b409fd76a944df51ad7b3c7d4fcee5 | |
| parent | drm/i915/guc/slpc: Allow SLPC to use efficient frequency (diff) | |
| download | wireguard-linux-6509dd1111928a351204af1fc8e6aa61e0c59002.tar.xz wireguard-linux-6509dd1111928a351204af1fc8e6aa61e0c59002.zip | |
drm/i915: Skip Bit12 fw domain reset for gen12+
Bit12 of the Forcewake request register should not be cleared post
gen12. Do not touch this bit while clearing during fw domain reset.
v2: Tweak the comment to drop older platforms(MattR)
Bspec: 52542
Signed-off-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220817224304.255767-1-radhakrishna.sripada@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/intel_uncore.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index a852c471d1b3..2a21c6515eaf 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -112,8 +112,11 @@ fw_domain_reset(const struct intel_uncore_forcewake_domain *d) * trying to reset here does exist at this point (engines could be fused * off in ICL+), so no waiting for acks */ - /* WaRsClearFWBitsAtReset:bdw,skl */ - fw_clear(d, 0xffff); + /* WaRsClearFWBitsAtReset */ + if (GRAPHICS_VER(d->uncore->i915) >= 12) + fw_clear(d, 0xefff); + else + fw_clear(d, 0xffff); } static inline void |