diff options
| author |   Imran Shaik <quic_imrashai@quicinc.com> | 2023-11-23 12:17:35 +0530 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2023-12-07 08:47:26 -0800 |
| commit | 66ec7b4f471300003c13b87a99bbd55255da5ba9 (patch) | |
| tree | a17e2570f92f6fc77cab543aeb0cbcc8264e8e26 | |
| parent | arm64: dts: qcom: sm8550: fix USB wakeup interrupt types (diff) | |
| download | wireguard-linux-66ec7b4f471300003c13b87a99bbd55255da5ba9.tar.xz wireguard-linux-66ec7b4f471300003c13b87a99bbd55255da5ba9.zip | |
arm64: dts: qcom: qdu1000: Add ECPRI clock controller
Add device node for ECPRI clock controller on qcom QDU1000
and QRU1000 SoCs.
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231123064735.2979802-5-quic_imrashai@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/qdu1000.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index 89eff977d40e..832f472c4b7a 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -381,6 +381,20 @@ #power-domain-cells = <1>; }; + ecpricc: clock-controller@280000 { + compatible = "qcom,qdu1000-ecpricc"; + reg = <0x0 0x00280000 0x0 0x31c00>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_ECPRI_CC_GPLL0_CLK_SRC>, + <&gcc GCC_ECPRI_CC_GPLL1_EVEN_CLK_SRC>, + <&gcc GCC_ECPRI_CC_GPLL2_EVEN_CLK_SRC>, + <&gcc GCC_ECPRI_CC_GPLL3_CLK_SRC>, + <&gcc GCC_ECPRI_CC_GPLL4_CLK_SRC>, + <&gcc GCC_ECPRI_CC_GPLL5_EVEN_CLK_SRC>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + gpi_dma0: dma-controller@900000 { compatible = "qcom,qdu1000-gpi-dma", "qcom,sm6350-gpi-dma"; reg = <0x0 0x900000 0x0 0x60000>; |