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| author |   Arnd Bergmann <arnd@arndb.de> | 2025-05-22 12:59:04 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-05-22 12:59:04 +0200 |
| commit | 74b1d172c3b59ccff03761d9aad4bba54c0bf862 (patch) | |
| tree | 47822a5c7a216fce3af0a1fb3415b633b5d9f7d7 | |
| parent | arm64: defconfig: enable ACPM protocol and Exynos mailbox (diff) | |
| parent | riscv: defconfig: spacemit: enable clock controller driver for SpacemiT K1 (diff) | |
| download | wireguard-linux-74b1d172c3b59ccff03761d9aad4bba54c0bf862.tar.xz wireguard-linux-74b1d172c3b59ccff03761d9aad4bba54c0bf862.zip | |
Merge tag 'riscv-config-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/defconfig
RISC-V config for v6.16
PM_GENERIC_DOMAINS is enabled because T-Head SoCs need to use it and
spacemit's gpio and clock controller are enabled for more obvious
reasons.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-config-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: defconfig: spacemit: enable clock controller driver for SpacemiT K1
riscv: defconfig: spacemit: enable gpio support for K1 SoC
riscv: Enable PM_GENERIC_DOMAINS for T-Head SoCs
Link: https://lore.kernel.org/r/20250516-joystick-mortified-385820b1ad0b@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/riscv/Kconfig.socs | 1 | ||||
| -rw-r--r-- | arch/riscv/configs/defconfig | 3 |
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 8b503e54fa1b..a9c3d2f6debc 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -54,6 +54,7 @@ config ARCH_THEAD bool "T-HEAD RISC-V SoCs" depends on MMU && !XIP_KERNEL select ERRATA_THEAD + select PM_GENERIC_DOMAINS if PM help This enables support for the RISC-V based T-HEAD SoCs. diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 3c8e16d71e17..eea825ee58e1 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -169,6 +169,7 @@ CONFIG_PINCTRL_SOPHGO_SG2002=y CONFIG_PINCTRL_TH1520=y CONFIG_GPIO_DWAPB=y CONFIG_GPIO_SIFIVE=y +CONFIG_GPIO_SPACEMIT_K1=y CONFIG_POWER_RESET_GPIO_RESTART=y CONFIG_SENSORS_SFCTEMP=m CONFIG_CPU_THERMAL=y @@ -250,6 +251,8 @@ CONFIG_CLK_SOPHGO_CV1800=y CONFIG_CLK_SOPHGO_SG2042_PLL=y CONFIG_CLK_SOPHGO_SG2042_CLKGEN=y CONFIG_CLK_SOPHGO_SG2042_RPGATE=y +CONFIG_SPACEMIT_CCU=y +CONFIG_SPACEMIT_K1_CCU=y CONFIG_SUN8I_DE2_CCU=m CONFIG_SUN50I_IOMMU=y CONFIG_RPMSG_CHAR=y |