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authorVille Syrjälä <ville.syrjala@linux.intel.com>2026-05-12 00:41:14 +0300
committerMaarten Lankhorst <dev@lankhorst.se>2026-07-14 15:17:11 +0200
commit7745c857ddc866acfd141ce44f2d8d3f6535047b (patch)
treec5339fa47e35e8bc466d7f8b45c9695ba201395e
parentdrm/i915: Use drm_dbg_kms() for initial FB debugs (diff)
drm/xe: Do the initial FB size alignment earlier
For some reason we've split the alignment of 'base' vs. 'size' to live on separate sides of the xe initial plane PTE readout. There's no reason for this split, so make things less confusing by aligning both at the same time. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260511214122.8468-7-ville.syrjala@linux.intel.com Signed-off-by: Maarten Lankhorst <dev@lankhorst.se> Acked-by: Matthew Brost <matthew.brost@intel.com> #teams
-rw-r--r--drivers/gpu/drm/xe/display/xe_initial_plane.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/xe/display/xe_initial_plane.c b/drivers/gpu/drm/xe/display/xe_initial_plane.c
index da04ee66252a..feb979cca12a 100644
--- a/drivers/gpu/drm/xe/display/xe_initial_plane.c
+++ b/drivers/gpu/drm/xe/display/xe_initial_plane.c
@@ -37,6 +37,10 @@ initial_plane_bo(struct xe_device *xe,
flags = XE_BO_FLAG_FORCE_WC | XE_BO_FLAG_GGTT;
base = round_down(plane_config->base, page_size);
+ size = round_up(plane_config->base + plane_config->size,
+ page_size);
+ size -= base;
+
if (IS_DGFX(xe)) {
u64 pte = xe_ggtt_read_pte(tile0->mem.ggtt, base);
@@ -79,10 +83,6 @@ initial_plane_bo(struct xe_device *xe,
}
}
- size = round_up(plane_config->base + plane_config->size,
- page_size);
- size -= base;
-
bo = xe_bo_create_pin_map_at_novm(xe, tile0, size, phys_base,
ttm_bo_type_kernel, flags, 0, false);
if (IS_ERR(bo)) {