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author | 2024-06-05 10:09:40 +0200 | |
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committer | 2024-06-12 23:03:13 -0500 | |
commit | 7b69a903fc73188c50577565093a5b3680448c57 (patch) | |
tree | 1338132f31ce50b198feb9e85f6e2ae28d7412ce | |
parent | dt-bindings: clock: qcom,sdm845-dispcc: reference qcom,gcc.yaml (diff) | |
download | wireguard-linux-7b69a903fc73188c50577565093a5b3680448c57.tar.xz wireguard-linux-7b69a903fc73188c50577565093a5b3680448c57.zip |
dt-bindings: clock: qcom,sm6115-dispcc: reference qcom,gcc.yaml
Just like most of Qualcomm clock controllers, we can reference common
qcom,gcc.yaml schema to unify the common parts of the binding.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240605-dt-bindings-qcom-gcc-v2-13-f947b24f1283@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml | 20 |
1 files changed, 4 insertions, 16 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml index f802a2e7f818..00be36683eb5 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml @@ -28,27 +28,15 @@ properties: - description: Pixel clock from DSI PHY0 - description: GPLL0 DISP DIV clock from GCC - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - required: - compatible - - reg - clocks - - '#clock-cells' - - '#reset-cells' - '#power-domain-cells' -additionalProperties: false +allOf: + - $ref: qcom,gcc.yaml# + +unevaluatedProperties: false examples: - | |