diff options
| author | 2026-09-23 12:51:58 +0200 | |
|---|---|---|
| committer | 2026-09-24 01:57:52 +0000 | |
| commit | 8110ba09777873443db286b3cbb89b0e6311c554 (patch) | |
| tree | ce57e0144d7500f4dd93ccd2c5b2cf96b0c5e8af | |
| parent | bpf: Fix immediate JMP JEQ/JNE on MIPS32 (diff) | |
bpf: Fix BSWAP 32 and 16 on MIPS64
The 16/32-bit byteswap implementations for MIPS64r1 and earlier do
not have an explicit zero extension afterwards. The input is first
sign-extended to 64 bits, and the byteswap sequence can then leave
the result sign-extended depending on the value of the low bits.
Add the missing zero-extension.
Found with test_bpf on MIPS64r1 emulated by QEMU.
Fixes: fbc802de6b10 ("mips, bpf: Add new eBPF JIT for 64-bit MIPS")
Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Link: https://patch.msgid.link/20260923105158.3514342-2-johan.almbladh@anyfinetworks.com
| -rw-r--r-- | arch/mips/net/bpf_jit_comp64.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/net/bpf_jit_comp64.c b/arch/mips/net/bpf_jit_comp64.c index fa7e9aa37f49..6681ccac9dd9 100644 --- a/arch/mips/net/bpf_jit_comp64.c +++ b/arch/mips/net/bpf_jit_comp64.c @@ -305,8 +305,7 @@ static void emit_bswap_r64(struct jit_context *ctx, u8 dst, u32 width) case 16: emit_sext(ctx, dst, dst); emit_bswap_r(ctx, dst, width); - if (cpu_has_mips64r2 || cpu_has_mips64r6) - emit_zext(ctx, dst); + emit_zext(ctx, dst); break; } clobber_reg(ctx, dst); |
