diff options
| author |   Ralf Baechle <ralf@linux-mips.org> | 2005-09-03 15:56:16 -0700 |
|---|---|---|
| committer |   Linus Torvalds <torvalds@evo.osdl.org> | 2005-09-05 00:06:06 -0700 |
| commit | 875d43e72b5bf22161a81de7554f88eccf8a51ae (patch) | |
| tree | a676fe7298b478b7ee9fe7be9cb07c9a0b928370 | |
| parent | [PATCH] mips: changed from VR41xx to VR4100 series in Kconfig (diff) | |
| download | wireguard-linux-875d43e72b5bf22161a81de7554f88eccf8a51ae.tar.xz wireguard-linux-875d43e72b5bf22161a81de7554f88eccf8a51ae.zip | |
[PATCH] mips: clean up 32/64-bit configuration
Start cleaning 32-bit vs. 64-bit configuration.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
110 files changed, 330 insertions, 319 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 77ba9ffdf463..d892a23fa978 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -4,26 +4,37 @@ config MIPS # Horrible source of confusion. Die, die, die ... select EMBEDDED -config MIPS64 - bool "64-bit kernel" +mainmenu "Linux/MIPS Kernel Configuration" + +source "init/Kconfig" + +menu "Kernel type" + +choice + + prompt "Kernel code model" help - Select this option if you want to build a 64-bit kernel. You should - only select this option if you have hardware that actually has a - 64-bit processor and if your application will actually benefit from - 64-bit processing, otherwise say N. You must say Y for kernels for - SGI IP27 (Origin 200 and 2000) and SGI IP32 (O2). If in doubt say N. + You should only select this option if you have a workload that + actually benefits from 64-bit processing or if your machine has + large memory. You will only be presented a single option in this + menu if your system does not support both 32-bit and 64-bit kernels. -config 64BIT - def_bool MIPS64 +config 32BIT + bool "32-bit kernel" + depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL + select TRAD_SIGNALS + help + Select this option if you want to build a 32-bit kernel. -config MIPS32 - bool - depends on MIPS64 = 'n' - default y +config 64BIT + bool "64-bit kernel" + depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL + help + Select this option if you want to build a 64-bit kernel. -mainmenu "Linux/MIPS Kernel Configuration" +endchoice -source "init/Kconfig" +endmenu menu "Machine selection" @@ -155,7 +166,7 @@ config VRC4173 config TOSHIBA_JMR3927 bool "Support for Toshiba JMR-TX3927 board" - depends on MIPS32 + depends on 32BIT select DMA_NONCOHERENT select HW_HAS_PCI select SWAP_IO_SPACE @@ -173,7 +184,7 @@ config MACH_DECSTATION select BOOT_ELF32 select DMA_NONCOHERENT select IRQ_CPU - depends on MIPS32 || EXPERIMENTAL + depends on 32BIT || EXPERIMENTAL ---help--- This enables support for DEC's MIPS based workstations. For details see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the @@ -480,7 +491,7 @@ config SGI_IP22 config SGI_IP27 bool "Support for SGI IP27 (Origin200/2000)" - depends on MIPS64 + depends on 64BIT select ARC select ARC64 select DMA_IP27 @@ -548,7 +559,7 @@ config REPLICATE_EXHANDLERS config SGI_IP32 bool "Support for SGI IP32 (O2) (EXPERIMENTAL)" - depends on MIPS64 && EXPERIMENTAL + depends on 64BIT && EXPERIMENTAL select ARC select ARC32 select BOOT_ELF32 @@ -562,7 +573,7 @@ config SGI_IP32 If you want this kernel to run on SGI O2 workstation, say Y here. config SOC_AU1X00 - depends on MIPS32 + depends on 32BIT bool "Support for AMD/Alchemy Au1X00 SOCs" choice @@ -902,7 +913,7 @@ config SNI_RM200_PCI config TOSHIBA_RBTX4927 bool "Support for Toshiba TBTX49[23]7 board" - depends on MIPS32 + depends on 32BIT select DMA_NONCOHERENT select HAS_TXX9_SERIAL select HW_HAS_PCI @@ -1171,7 +1182,7 @@ config CPU_R3000 config CPU_TX39XX bool "R39XX" - depends on MIPS32 + depends on 32BIT config CPU_VR41XX bool "R41xx" @@ -1205,7 +1216,7 @@ config CPU_R5432 config CPU_R6000 bool "R6000" - depends on MIPS32 && EXPERIMENTAL + depends on 32BIT && EXPERIMENTAL help MIPS Technologies R6000 and R6000A series processors. Note these processors are extremly rare and the support for them is incomplete. @@ -1217,7 +1228,7 @@ config CPU_NEVADA config CPU_R8000 bool "R8000" - depends on MIPS64 && EXPERIMENTAL + depends on 64BIT && EXPERIMENTAL help MIPS Technologies R8000 processors. Note these processors are uncommon and the support for them is incomplete. @@ -1330,11 +1341,11 @@ config SB1_PASS_2_1_WORKAROUNDS config 64BIT_PHYS_ADDR bool "Support for 64-bit physical address space" - depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && MIPS32 + depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT config CPU_ADVANCED bool "Override CPU Options" - depends on MIPS32 + depends on 32BIT help Saying yes here allows you to select support for various features your CPU may or may not have. Most people should say N here. @@ -1388,7 +1399,7 @@ config CPU_HAS_SYNC # config HIGHMEM bool "High Memory Support" - depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(MACH_DECSTATION || MOMENCO_JAGUAR_ATX) + depends on 32BIT && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(MACH_DECSTATION || MOMENCO_JAGUAR_ATX) config ARCH_FLATMEM_ENABLE def_bool y @@ -1448,7 +1459,7 @@ config RTC_DS1742 config MIPS_INSANE_LARGE bool "Support for large 64-bit configurations" - depends on CPU_R10000 && MIPS64 + depends on CPU_R10000 && 64BIT help MIPS R10000 does support a 44 bit / 16TB address space as opposed to previous 64-bit processors which only supported 40 bit / 1TB. If you @@ -1549,11 +1560,11 @@ source "fs/Kconfig.binfmt" config TRAD_SIGNALS bool - default y if MIPS32 + default y if 32BIT config BUILD_ELF64 bool "Use 64-bit ELF format for building" - depends on MIPS64 + depends on 64BIT help A 64-bit kernel is usually built using the 64-bit ELF binary object format as it's one that allows arbitrary 64-bit constructs. For @@ -1568,11 +1579,11 @@ config BUILD_ELF64 config BINFMT_IRIX bool "Include IRIX binary compatibility" - depends on !CPU_LITTLE_ENDIAN && MIPS32 && BROKEN + depends on !CPU_LITTLE_ENDIAN && 32BIT && BROKEN config MIPS32_COMPAT bool "Kernel support for Linux/MIPS 32-bit binary compatibility" - depends on MIPS64 + depends on 64BIT help Select this option if you want Linux/MIPS 32-bit binary compatibility. Since all software available for Linux/MIPS is diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 7d1d7c91b857..a33328ef86f7 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -37,12 +37,12 @@ else 64bit-emul = elf64btsmip endif -ifdef CONFIG_MIPS32 +ifdef CONFIG_32BIT gcc-abi = 32 tool-prefix = $(32bit-tool-prefix) UTS_MACHINE := mips endif -ifdef CONFIG_MIPS64 +ifdef CONFIG_64BIT gcc-abi = 64 tool-prefix = $(64bit-tool-prefix) UTS_MACHINE := mips64 @@ -63,7 +63,7 @@ ld-emul = $(32bit-emul) vmlinux-32 = vmlinux vmlinux-64 = vmlinux.64 -cflags-$(CONFIG_MIPS64) += $(call cc-option,-mno-explicit-relocs) +cflags-$(CONFIG_64BIT) += $(call cc-option,-mno-explicit-relocs) endif # @@ -524,10 +524,10 @@ load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000 # core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/ cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22 -ifdef CONFIG_MIPS32 +ifdef CONFIG_32BIT load-$(CONFIG_SGI_IP22) += 0xffffffff88002000 endif -ifdef CONFIG_MIPS64 +ifdef CONFIG_64BIT load-$(CONFIG_SGI_IP22) += 0xffffffff88004000 endif @@ -632,7 +632,7 @@ load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000 cflags-y += -Iinclude/asm-mips/mach-generic drivers-$(CONFIG_PCI) += arch/mips/pci/ -ifdef CONFIG_MIPS32 +ifdef CONFIG_32BIT ifdef CONFIG_CPU_LITTLE_ENDIAN JIFFIES = jiffies_64 else @@ -664,8 +664,8 @@ CPPFLAGS_vmlinux.lds := \ head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o libs-y += arch/mips/lib/ -libs-$(CONFIG_MIPS32) += arch/mips/lib-32/ -libs-$(CONFIG_MIPS64) += arch/mips/lib-64/ +libs-$(CONFIG_32BIT) += arch/mips/lib-32/ +libs-$(CONFIG_64BIT) += arch/mips/lib-64/ core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/ diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig index caad7ca27abd..4084ca3a7581 100644 --- a/arch/mips/configs/atlas_defconfig +++ b/arch/mips/configs/atlas_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:00 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig index 1b7f8a702d06..9abdcbc20a9e 100644 --- a/arch/mips/configs/capcella_defconfig +++ b/arch/mips/configs/capcella_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:00 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig index 8861854561e5..ddcfcfbe098a 100644 --- a/arch/mips/configs/cobalt_defconfig +++ b/arch/mips/configs/cobalt_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:00 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig index 19cac1bf4f01..05905dfec1e6 100644 --- a/arch/mips/configs/db1000_defconfig +++ b/arch/mips/configs/db1000_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:01 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig index 035ac95d197e..610ff73a6706 100644 --- a/arch/mips/configs/db1100_defconfig +++ b/arch/mips/configs/db1100_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:01 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig index c38c4ed18fe7..fed6f2fab48b 100644 --- a/arch/mips/configs/db1500_defconfig +++ b/arch/mips/configs/db1500_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:01 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig index ee81309ae3a5..178c0ad1af75 100644 --- a/arch/mips/configs/db1550_defconfig +++ b/arch/mips/configs/db1550_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:02 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig index d43ed57c4b4e..345cc8b078fc 100644 --- a/arch/mips/configs/ddb5476_defconfig +++ b/arch/mips/configs/ddb5476_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:02 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig index 5a032cdefd63..4acb9e48d24e 100644 --- a/arch/mips/configs/ddb5477_defconfig +++ b/arch/mips/configs/ddb5477_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:02 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig index 32ada79da9d8..27b21fb4f13a 100644 --- a/arch/mips/configs/decstation_defconfig +++ b/arch/mips/configs/decstation_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:03 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig index 52074a2085fb..3812e5f10c9b 100644 --- a/arch/mips/configs/e55_defconfig +++ b/arch/mips/configs/e55_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:03 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig index 360e842fd4be..705cdbd682d6 100644 --- a/arch/mips/configs/ev64120_defconfig +++ b/arch/mips/configs/ev64120_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:03 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig index 657a9508d31a..4c89dfef8e78 100644 --- a/arch/mips/configs/ev96100_defconfig +++ b/arch/mips/configs/ev96100_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:03 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig index 3fb102e6a7f7..2990802899da 100644 --- a/arch/mips/configs/ip22_defconfig +++ b/arch/mips/configs/ip22_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:04 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index b5bab3a42fc4..b2a67da1e031 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig @@ -4,7 +4,7 @@ # Wed Jan 26 02:49:04 2005 # CONFIG_MIPS=y -CONFIG_MIPS64=y +CONFIG_64BIT=y CONFIG_64BIT=y # diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig index bdf1415475ff..2759162f173b 100644 --- a/arch/mips/configs/ip32_defconfig +++ b/arch/mips/configs/ip32_defconfig @@ -4,7 +4,7 @@ # Wed Jan 26 02:49:04 2005 # CONFIG_MIPS=y -CONFIG_MIPS64=y +CONFIG_64BIT=y CONFIG_64BIT=y # diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig index 1ca7746388f0..09c83a01dd92 100644 --- a/arch/mips/configs/it8172_defconfig +++ b/arch/mips/configs/it8172_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:05 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig index c6eef708be1e..121d0c029c5d 100644 --- a/arch/mips/configs/ivr_defconfig +++ b/arch/mips/configs/ivr_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:05 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig index 757c4e88cc00..d4e19da57d70 100644 --- a/arch/mips/configs/jaguar-atx_defconfig +++ b/arch/mips/configs/jaguar-atx_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:05 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig index e5a613906554..c95e52a9d8bb 100644 --- a/arch/mips/configs/jmr3927_defconfig +++ b/arch/mips/configs/jmr3927_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:06 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig index 1e7697834e90..3b4d7e6afac4 100644 --- a/arch/mips/configs/lasat200_defconfig +++ b/arch/mips/configs/lasat200_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:06 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig index 61fb9fb97e6e..33e6bb62f2ea 100644 --- a/arch/mips/configs/malta_defconfig +++ b/arch/mips/configs/malta_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:53:14 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig index 31b8f2ad7338..ed44a1a660f7 100644 --- a/arch/mips/configs/mpc30x_defconfig +++ b/arch/mips/configs/mpc30x_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:07 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig index 2cce682fffcf..daa5b8828f57 100644 --- a/arch/mips/configs/ocelot_3_defconfig +++ b/arch/mips/configs/ocelot_3_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:07 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig index 0cbf48a62e02..bdefd4f1310a 100644 --- a/arch/mips/configs/ocelot_c_defconfig +++ b/arch/mips/configs/ocelot_c_defconfig @@ -4,7 +4,7 @@ # Wed Jan 26 02:49:07 2005 # CONFIG_MIPS=y -CONFIG_MIPS64=y +CONFIG_64BIT=y CONFIG_64BIT=y # diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig index 4043950d360a..7526b4748dfe 100644 --- a/arch/mips/configs/ocelot_defconfig +++ b/arch/mips/configs/ocelot_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:08 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig index 3870af4537ad..f372508bc25b 100644 --- a/arch/mips/configs/ocelot_g_defconfig +++ b/arch/mips/configs/ocelot_g_defconfig @@ -4,7 +4,7 @@ # Wed Jan 26 02:49:08 2005 # CONFIG_MIPS=y -CONFIG_MIPS64=y +CONFIG_64BIT=y CONFIG_64BIT=y # diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig index 6cdabd550300..b7b95789fefb 100644 --- a/arch/mips/configs/pb1100_defconfig +++ b/arch/mips/configs/pb1100_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:08 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig index 2aebbd2e82b3..49e528340a39 100644 --- a/arch/mips/configs/pb1500_defconfig +++ b/arch/mips/configs/pb1500_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:09 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig index 9e21edc28280..8e426776c098 100644 --- a/arch/mips/configs/pb1550_defconfig +++ b/arch/mips/configs/pb1550_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:09 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig index d0c85a4009d6..021cfe38371a 100644 --- a/arch/mips/configs/rm200_defconfig +++ b/arch/mips/configs/rm200_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:09 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig index 84978b70714b..1dc935f37582 100644 --- a/arch/mips/configs/sb1250-swarm_defconfig +++ b/arch/mips/configs/sb1250-swarm_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:10 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig index 7c718a429b04..4d2fde827f01 100644 --- a/arch/mips/configs/sead_defconfig +++ b/arch/mips/configs/sead_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:10 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig index e01727cd0fe9..53e3d4adf1dd 100644 --- a/arch/mips/configs/tb0226_defconfig +++ b/arch/mips/configs/tb0226_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:12 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/tb0229_defconfig b/arch/mips/configs/tb0229_defconfig index c6ba3de27614..0fe7f505226e 100644 --- a/arch/mips/configs/tb0229_defconfig +++ b/arch/mips/configs/tb0229_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:12 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig index 915c43b6e2d9..d793616effbb 100644 --- a/arch/mips/configs/workpad_defconfig +++ b/arch/mips/configs/workpad_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:12 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig index 562f2b8043ac..6d2290777ad7 100644 --- a/arch/mips/configs/yosemite_defconfig +++ b/arch/mips/configs/yosemite_defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:49:13 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S index 3b3790993219..c89768d5c4e5 100644 --- a/arch/mips/dec/int-handler.S +++ b/arch/mips/dec/int-handler.S @@ -133,7 +133,7 @@ */ mfc0 t0,CP0_CAUSE # get pending interrupts mfc0 t1,CP0_STATUS -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT lw t2,cpu_fpu_mask #endif andi t0,ST0_IM # CAUSE.CE may be non-zero! @@ -141,7 +141,7 @@ beqz t0,spurious -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT and t2,t0 bnez t2,fpu # handle FPU immediately #endif @@ -271,7 +271,7 @@ handle_it: j ret_from_irq nop -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT fpu: j handle_fpe_int nop diff --git a/arch/mips/dec/prom/Makefile b/arch/mips/dec/prom/Makefile index 373822ec2d8c..bcd0247b3a66 100644 --- a/arch/mips/dec/prom/Makefile +++ b/arch/mips/dec/prom/Makefile @@ -5,7 +5,7 @@ lib-y += init.o memory.o cmdline.o identify.o console.o -lib-$(CONFIG_MIPS32) += locore.o -lib-$(CONFIG_MIPS64) += call_o32.o +lib-$(CONFIG_32BIT) += locore.o +lib-$(CONFIG_64BIT) += call_o32.o EXTRA_AFLAGS := $(CFLAGS) diff --git a/arch/mips/defconfig b/arch/mips/defconfig index d55fe665926f..2081583daabc 100644 --- a/arch/mips/defconfig +++ b/arch/mips/defconfig @@ -4,9 +4,9 @@ # Wed Jan 26 02:48:59 2005 # CONFIG_MIPS=y -# CONFIG_MIPS64 is not set # CONFIG_64BIT is not set -CONFIG_MIPS32=y +# CONFIG_64BIT is not set +CONFIG_32BIT=y # # Code maturity level options diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index a0230ee0f7f4..d3303584fbd1 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -13,8 +13,8 @@ binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \ ifdef CONFIG_MODULES obj-y += mips_ksyms.o module.o -obj-$(CONFIG_MIPS32) += module-elf32.o -obj-$(CONFIG_MIPS64) += module-elf64.o +obj-$(CONFIG_32BIT) += module-elf32.o +obj-$(CONFIG_64BIT) += module-elf64.o endif obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o @@ -45,8 +45,8 @@ obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o obj-$(CONFIG_IRQ_MV64340) += irq-mv6434x.o -obj-$(CONFIG_MIPS32) += scall32-o32.o -obj-$(CONFIG_MIPS64) += scall64-64.o +obj-$(CONFIG_32BIT) += scall32-o32.o +obj-$(CONFIG_64BIT) += scall64-64.o obj-$(CONFIG_BINFMT_IRIX) += binfmt_irix.o obj-$(CONFIG_MIPS32_COMPAT) += ioctl32.o linux32.o signal32.o obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o @@ -55,7 +55,7 @@ obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall64-o32.o ptrace32.o obj-$(CONFIG_KGDB) += gdb-low.o gdb-stub.o obj-$(CONFIG_PROC_FS) += proc.o -obj-$(CONFIG_MIPS64) += cpu-bugs64.o +obj-$(CONFIG_64BIT) += cpu-bugs64.o obj-$(CONFIG_GEN_RTC) += genrtc.o diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S index ece6ddaf7011..512bedbfa7b9 100644 --- a/arch/mips/kernel/gdb-low.S +++ b/arch/mips/kernel/gdb-low.S @@ -13,13 +13,13 @@ #include <asm/stackframe.h> #include <asm/gdb-stub.h> -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define DMFC0 mfc0 #define DMTC0 mtc0 #define LDC1 lwc1 #define SDC1 lwc1 #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define DMFC0 dmfc0 #define DMTC0 dmtc0 #define LDC1 ldc1 diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index a5b0a389b063..3a1a3e7586f6 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -54,7 +54,7 @@ NESTED(except_vec3_generic, 0, sp) #endif mfc0 k1, CP0_CAUSE andi k1, k1, 0x7c -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT dsll k1, k1, 1 #endif PTR_L k0, exception_handlers(k1) @@ -81,7 +81,7 @@ NESTED(except_vec3_r4000, 0, sp) beq k1, k0, handle_vced li k0, 14<<2 beq k1, k0, handle_vcei -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT dsll k1, k1, 1 #endif .set pop @@ -244,10 +244,10 @@ NESTED(nmi_handler, PT_SIZE, sp) start with an n and gas will believe \n is ok ... */ .macro __BUILD_verbose nexception LONG_L a1, PT_EPC(sp) -#if CONFIG_MIPS32 +#if CONFIG_32BIT PRINT("Got \nexception at %08lx\012") #endif -#if CONFIG_MIPS64 +#if CONFIG_64BIT PRINT("Got \nexception at %016lx\012") #endif .endm @@ -293,7 +293,7 @@ NESTED(nmi_handler, PT_SIZE, sp) BUILD_HANDLER mcheck mcheck cli verbose /* #24 */ BUILD_HANDLER reserved reserved sti verbose /* others */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* A temporary overflow handler used by check_daddi(). */ __INIT diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index a64e87d22014..2a1b45d66f04 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S @@ -107,7 +107,7 @@ .endm .macro setup_c0_status_pri -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT setup_c0_status ST0_KX 0 #else setup_c0_status 0 0 @@ -115,7 +115,7 @@ .endm .macro setup_c0_status_sec -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT setup_c0_status ST0_KX ST0_BEV #else setup_c0_status 0 ST0_BEV @@ -215,7 +215,7 @@ NESTED(smp_bootstrap, 16, sp) * slightly different layout ... */ page swapper_pg_dir, _PGD_ORDER -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT page invalid_pmd_table, _PMD_ORDER #endif page invalid_pte_table, _PTE_ORDER diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c index eed29fc9dc82..86e42c633f73 100644 --- a/arch/mips/kernel/mips_ksyms.c +++ b/arch/mips/kernel/mips_ksyms.c @@ -35,7 +35,7 @@ EXPORT_SYMBOL(memcpy); EXPORT_SYMBOL(memmove); EXPORT_SYMBOL(strcat); EXPORT_SYMBOL(strchr); -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT EXPORT_SYMBOL(strncmp); #endif EXPORT_SYMBOL(strlen); diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index 6e70c42c2058..e4f2f8011387 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -70,7 +70,7 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp) /* New thread loses kernel privileges. */ status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|KU_MASK); -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT status &= ~ST0_FR; status |= (current->thread.mflags & MF_32BIT_REGS) ? 0 : ST0_FR; #endif @@ -236,10 +236,10 @@ static int __init get_frame_info(struct mips_frame_info *info, void *func) break; if ( -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT ip->i_format.opcode == sw_op && #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT ip->i_format.opcode == sd_op && #endif ip->i_format.rs == 29) @@ -353,7 +353,7 @@ schedule_timeout_caller: out: -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT if (current->thread.mflags & MF_32BIT_REGS) /* Kludge for 32-bit ps */ pc &= 0xffffffffUL; #endif diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 92e70ca3bff9..0b571a5b4b83 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -124,7 +124,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) if (tsk_used_math(child)) { fpureg_t *fregs = get_fpu_regs(child); -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT /* * The odd registers are actually the high * order bits of the values stored in the even @@ -135,7 +135,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) else tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff); #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT tmp = fregs[addr - FPR_BASE]; #endif } else { @@ -213,7 +213,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) sizeof(child->thread.fpu.hard)); child->thread.fpu.hard.fcr31 = 0; } -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT /* * The odd registers are actually the high order bits * of the values stored in the even registers - unless @@ -227,7 +227,7 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) fregs[addr - FPR_BASE] |= data; } #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT fregs[addr - FPR_BASE] = data; #endif break; @@ -304,14 +304,14 @@ out: static inline int audit_arch(void) { #ifdef CONFIG_CPU_LITTLE_ENDIAN -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT if (!(current->thread.mflags & MF_32BIT_REGS)) return AUDIT_ARCH_MIPSEL64; #endif /* MIPS64 */ return AUDIT_ARCH_MIPSEL; #else /* big endian... */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT if (!(current->thread.mflags & MF_32BIT_REGS)) return AUDIT_ARCH_MIPS64; #endif /* MIPS64 */ diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S index ebb643d8d14c..aba665bcb386 100644 --- a/arch/mips/kernel/r4k_fpu.S +++ b/arch/mips/kernel/r4k_fpu.S @@ -36,7 +36,7 @@ LEAF(_save_fp_context) cfc1 t1, fcr31 -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* Store the 16 odd double precision registers */ EX sdc1 $f1, SC_FPREGS+8(a0) EX sdc1 $f3, SC_FPREGS+24(a0) @@ -118,7 +118,7 @@ LEAF(_save_fp_context32) */ LEAF(_restore_fp_context) EX lw t0, SC_FPC_CSR(a0) -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT EX ldc1 $f1, SC_FPREGS+8(a0) EX ldc1 $f3, SC_FPREGS+24(a0) EX ldc1 $f5, SC_FPREGS+40(a0) diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index 1fc3b2eb12bd..175dd1fcbb33 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S @@ -105,7 +105,7 @@ * Save a thread's fp context. */ LEAF(_save_fp) -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT mfc0 t1, CP0_STATUS #endif fpu_save_double a0 t1 t0 t2 # clobbers t1 @@ -142,7 +142,7 @@ LEAF(_init_fpu) li t1, -1 # SNaN -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT sll t0, t0, 5 bgez t0, 1f # 16 / 32 register mode? diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 3a240e3e004c..12b531c295c4 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -241,7 +241,7 @@ static inline int parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_en if (*tmp) strcat(command_line, tmp); -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* HACK: Guess if the sign extension was forgotten */ if (start > 0x0000000080000000 && start < 0x00000000ffffffff) start |= 0xffffffff00000000; @@ -446,7 +446,7 @@ static inline void resource_init(void) { int i; -#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) +#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) /* * The 64bit code in 32bit object format trick can't represent * 64bit wide relocations for linker script symbols. diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 56c36e42e0a6..a53b1ed7b386 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -924,7 +924,7 @@ void __init per_cpu_trap_init(void) * flag that some firmware may have left set and the TS bit (for * IP27). Set XX for ISA IV code to work. */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT status_set |= ST0_FR|ST0_KX|ST0_SX|ST0_UX; #endif if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV) diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c index 3f24a1d45865..36c5212e0928 100644 --- a/arch/mips/kernel/unaligned.c +++ b/arch/mips/kernel/unaligned.c @@ -240,7 +240,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs, break; case lwu_op: -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* * A 32-bit kernel might be running on a 64-bit processor. But * if we're on a 32-bit processor and an i-cache incoherency @@ -278,13 +278,13 @@ static inline int emulate_load_store_insn(struct pt_regs *regs, *newvalue = value; *regptr = ®s->regs[insn.i_format.rt]; break; -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ /* Cannot handle 64-bit instructions in 32-bit kernel */ goto sigill; case ld_op: -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* * A 32-bit kernel might be running on a 64-bit processor. But * if we're on a 32-bit processor and an i-cache incoherency @@ -320,7 +320,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs, *newvalue = value; *regptr = ®s->regs[insn.i_format.rt]; break; -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ /* Cannot handle 64-bit instructions in 32-bit kernel */ goto sigill; @@ -392,7 +392,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs, break; case sd_op: -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* * A 32-bit kernel might be running on a 64-bit processor. But * if we're on a 32-bit processor and an i-cache incoherency @@ -428,7 +428,7 @@ static inline int emulate_load_store_insn(struct pt_regs *regs, if (res) goto fault; break; -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ /* Cannot handle 64-bit instructions in 32-bit kernel */ goto sigill; diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S index afa8eae18ff6..00d73be7dc27 100644 --- a/arch/mips/lib/memcpy.S +++ b/arch/mips/lib/memcpy.S @@ -79,7 +79,7 @@ /* * Only on the 64-bit kernel we can made use of 64-bit registers. */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define USE_DOUBLE #endif diff --git a/arch/mips/math-emu/kernel_linkage.c b/arch/mips/math-emu/kernel_linkage.c index 04397fec30fc..4002f0cf79f3 100644 --- a/arch/mips/math-emu/kernel_linkage.c +++ b/arch/mips/math-emu/kernel_linkage.c @@ -86,7 +86,7 @@ int fpu_emulator_restore_context(struct sigcontext *sc) return err; } -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* * This is the o32 version */ diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index f61e038b4440..b56a0abdc3d4 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile @@ -5,8 +5,8 @@ obj-y += cache.o extable.o fault.o init.o pgtable.o \ tlbex.o tlbex-fault.o -obj-$(CONFIG_MIPS32) += ioremap.o pgtable-32.o -obj-$(CONFIG_MIPS64) += pgtable-64.o +obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o +obj-$(CONFIG_64BIT) += pgtable-64.o obj-$(CONFIG_HIGHMEM) += highmem.o obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index a03ebb2cba67..20d40725e5bb 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -723,10 +723,10 @@ static void local_r4k_flush_cache_sigtramp(void * arg) ".set push\n\t" ".set noat\n\t" ".set mips3\n\t" -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT "la $at,1f\n\t" #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT "dla $at,1f\n\t" #endif "cache %0,($at)\n\t" diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 9c9a271c8a3a..dc6830b10fab 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -96,7 +96,7 @@ static void __init kmap_init(void) kmap_prot = PAGE_KERNEL; } -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT static void __init fixrange_init(unsigned long start, unsigned long end, pgd_t *pgd_base) { @@ -125,7 +125,7 @@ static void __init fixrange_init(unsigned long start, unsigned long end, j = 0; } } -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ #endif /* CONFIG_HIGHMEM */ #ifndef CONFIG_NEED_MULTIPLE_NODES @@ -258,7 +258,7 @@ void __init mem_init(void) #ifdef CONFIG_BLK_DEV_INITRD void free_initrd_mem(unsigned long start, unsigned long end) { -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* Switch from KSEG0 to XKPHYS addresses */ start = (unsigned long)phys_to_virt(CPHYSADDR(start)); end = (unsigned long)phys_to_virt(CPHYSADDR(end)); @@ -286,7 +286,7 @@ void free_initmem(void) addr = (unsigned long) &__init_begin; while (addr < (unsigned long) &__init_end) { -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT page = PAGE_OFFSET | CPHYSADDR(addr); #else page = addr; diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c index 59d131b5e536..b63e1ca350f5 100644 --- a/arch/mips/mm/pg-sb1.c +++ b/arch/mips/mm/pg-sb1.c @@ -114,7 +114,7 @@ static inline void copy_page_cpu(void *to, void *from) " pref " SB1_PREF_STORE_STREAMED_HINT ", -64(%1)\n" " pref " SB1_PREF_LOAD_STREAMED_HINT ", -32(%0)\n" "1: pref " SB1_PREF_STORE_STREAMED_HINT ", -32(%1)\n" -# ifdef CONFIG_MIPS64 +# ifdef CONFIG_64BIT " ld $8, -128(%0) \n" /* Block copy a cacheline */ " ld $9, -120(%0) \n" " ld $10, -112(%0) \n" @@ -148,7 +148,7 @@ static inline void copy_page_cpu(void *to, void *from) " daddiu %0, %0, -128 \n" " daddiu %1, %1, -128 \n" #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT " ld $8, 0(%0) \n" /* Block copy a cacheline */ "1: ld $9, 8(%0) \n" " ld $10, 16(%0) \n" @@ -178,7 +178,7 @@ static inline void copy_page_cpu(void *to, void *from) " daddiu %0, %0, 32 \n" " daddiu %1, %1, 32 \n" " bnel %0, %2, 1b \n" -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT " ld $8, 0(%0) \n" #else " lw $2, 0(%0) \n" @@ -186,7 +186,7 @@ static inline void copy_page_cpu(void *to, void *from) " .set pop \n" : "+r" (src), "+r" (dst) : "r" (end) -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT : "$8","$9","$10","$11","memory"); #else : "$2","$3","$6","$7","$8","$9","$10","$11","memory"); diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 87e229f4d3d5..592377fa694d 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -448,7 +448,7 @@ L_LA(_r3000_write_probe_fail) L_LA(_r3000_write_probe_ok) /* convenience macros for instructions */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT # define i_LW(buf, rs, rt, off) i_ld(buf, rs, rt, off) # define i_SW(buf, rs, rt, off) i_sd(buf, rs, rt, off) # define i_SLL(buf, rs, rt, sh) i_dsll(buf, rs, rt, sh) @@ -486,7 +486,7 @@ L_LA(_r3000_write_probe_ok) #define i_ssnop(buf) i_sll(buf, 0, 0, 1) #define i_ehb(buf) i_sll(buf, 0, 0, 3) -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT static __init int __attribute__((unused)) in_compat_space_p(long addr) { /* Is this address in 32bit compat space? */ @@ -516,7 +516,7 @@ static __init int rel_lo(long val) static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr) { -#if CONFIG_MIPS64 +#if CONFIG_64BIT if (!in_compat_space_p(addr)) { i_lui(buf, rs, rel_highest(addr)); if (rel_higher(addr)) @@ -682,7 +682,7 @@ static void il_bgezl(u32 **p, struct reloc **r, unsigned int reg, #define C0_EPC 14 #define C0_XCONTEXT 20 -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT # define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_XCONTEXT) #else # define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_CONTEXT) @@ -923,7 +923,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, } } -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* * TMP and PTR are scratch. * TMP will be clobbered, PTR will hold the pmd entry. @@ -1010,7 +1010,7 @@ build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r, } } -#else /* !CONFIG_MIPS64 */ +#else /* !CONFIG_64BIT */ /* * TMP and PTR are scratch. @@ -1038,7 +1038,7 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr) i_addu(p, ptr, ptr, tmp); /* add in pgd offset */ } -#endif /* !CONFIG_MIPS64 */ +#endif /* !CONFIG_64BIT */ static __init void build_adjust_context(u32 **p, unsigned int ctx) { @@ -1159,7 +1159,7 @@ static void __init build_r4000_tlb_refill_handler(void) /* No need for i_nop */ } -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ #else build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ @@ -1171,7 +1171,7 @@ static void __init build_r4000_tlb_refill_handler(void) l_leave(&l, p); i_eret(&p); /* return from trap */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT build_get_pgd_vmalloc64(&p, &l, &r, K0, K1); #endif @@ -1182,7 +1182,7 @@ static void __init build_r4000_tlb_refill_handler(void) * need three, with the the second nop'ed and the third being * unused. */ -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT if ((p - tlb_handler) > 64) panic("TLB refill handler space exceeded"); #else @@ -1195,12 +1195,12 @@ static void __init build_r4000_tlb_refill_handler(void) /* * Now fold the handler in the TLB refill handler space. */ -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT f = final_handler; /* Simplest case, just copy the handler. */ copy_handler(relocs, labels, tlb_handler, p, f); final_len = p - tlb_handler; -#else /* CONFIG_MIPS64 */ +#else /* CONFIG_64BIT */ f = final_handler + 32; if ((p - tlb_handler) <= 32) { /* Just copy the handler. */ @@ -1235,7 +1235,7 @@ static void __init build_r4000_tlb_refill_handler(void) copy_handler(relocs, labels, split, p, final_handler); final_len = (f - (final_handler + 32)) + (p - split); } -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ resolve_relocs(relocs, labels); printk("Synthesized TLB refill handler (%u instructions).\n", @@ -1605,7 +1605,7 @@ build_r4000_tlbchange_handler_head(u32 **p, struct label **l, struct reloc **r, unsigned int pte, unsigned int ptr) { -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ #else build_get_pgde32(p, pte, ptr); /* get pgd in ptr */ @@ -1636,7 +1636,7 @@ build_r4000_tlbchange_handler_tail(u32 **p, struct label **l, l_leave(l, *p); i_eret(p); /* return from trap */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT build_get_pgd_vmalloc64(p, l, r, tmp, ptr); #endif } diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c index fa5982ac0ac6..827960802b8f 100644 --- a/arch/mips/momentum/jaguar_atx/prom.c +++ b/arch/mips/momentum/jaguar_atx/prom.c @@ -90,7 +90,7 @@ void get_mac(char dest[6]) } #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT unsigned long signext(unsigned long addr) { @@ -143,7 +143,7 @@ char *arg64(unsigned long addrin, int arg_index) return p; } -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ /* PMON passes arguments in C main() style */ void __init prom_init(void) @@ -158,7 +158,7 @@ void __init prom_init(void) // ja_setup_console(); /* The very first thing. */ #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT char *ptr; printk("Mips64 Jaguar-ATX\n"); @@ -201,7 +201,7 @@ void __init prom_init(void) } printk("arcs_cmdline: %s\n", arcs_cmdline); -#else /* CONFIG_MIPS64 */ +#else /* CONFIG_64BIT */ /* save the PROM vectors for debugging use */ debug_vectors = cv; @@ -226,7 +226,7 @@ void __init prom_init(void) } env++; } -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ mips_machgroup = MACH_GROUP_MOMENCO; mips_machtype = MACH_MOMENCO_JAGUAR_ATX; diff --git a/arch/mips/momentum/jaguar_atx/reset.c b/arch/mips/momentum/jaguar_atx/reset.c index 48039484cdf9..c4236b1e59fa 100644 --- a/arch/mips/momentum/jaguar_atx/reset.c +++ b/arch/mips/momentum/jaguar_atx/reset.c @@ -27,7 +27,7 @@ void momenco_jaguar_restart(char *command) { /* base address of timekeeper portion of part */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT void *nvram = (void*) 0xfffffffffc807000; #else void *nvram = (void*) 0xfc807000; diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c index 30462e715066..3cf1e46aa4b8 100644 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ b/arch/mips/momentum/jaguar_atx/setup.c @@ -105,7 +105,7 @@ void __init bus_error_init(void) { /* nothing */ } static __init void wire_stupidity_into_tlb(void) { -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT write_c0_wired(0); local_flush_tlb_all(); diff --git a/arch/mips/momentum/ocelot_3/prom.c b/arch/mips/momentum/ocelot_3/prom.c index 89c17a0c0bed..c4fa9c525faa 100644 --- a/arch/mips/momentum/ocelot_3/prom.c +++ b/arch/mips/momentum/ocelot_3/prom.c @@ -93,7 +93,7 @@ void get_mac(char dest[6]) #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT unsigned long signext(unsigned long addr) { @@ -145,7 +145,7 @@ char *arg64(unsigned long addrin, int arg_index) return p; } -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ void __init prom_init(void) { @@ -155,7 +155,7 @@ void __init prom_init(void) struct callvectors *cv = (struct callvectors *) fw_arg3; int i; -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT char *ptr; printk("prom_init - MIPS64\n"); @@ -198,7 +198,7 @@ void __init prom_init(void) } printk("arcs_cmdline: %s\n", arcs_cmdline); -#else /* CONFIG_MIPS64 */ +#else /* CONFIG_64BIT */ /* save the PROM vectors for debugging use */ debug_vectors = cv; @@ -224,7 +224,7 @@ void __init prom_init(void) } env++; } -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ mips_machgroup = MACH_GROUP_MOMENCO; mips_machtype = MACH_MOMENCO_OCELOT_3; @@ -234,7 +234,7 @@ void __init prom_init(void) get_mac(prom_mac_addr_base); #endif -#ifndef CONFIG_MIPS64 +#ifndef CONFIG_64BIT debug_vectors->printf("Booting Linux kernel...\n"); #endif } diff --git a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h index a6cf7a7959b3..97fb77dad723 100644 --- a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h +++ b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h @@ -32,7 +32,7 @@ #include <linux/config.h> -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define OCELOT_C_CS0_ADDR (0xfffffffffc000000) #else #define OCELOT_C_CS0_ADDR (0xfc000000) diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c index 49ac302d8901..375877aebcf6 100644 --- a/arch/mips/momentum/ocelot_c/prom.c +++ b/arch/mips/momentum/ocelot_c/prom.c @@ -94,7 +94,7 @@ void get_mac(char dest[6]) #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT unsigned long signext(unsigned long addr) { @@ -144,7 +144,7 @@ char *arg64(unsigned long addrin, int arg_index) p = (char *)get_arg(args, arg_index); return p; } -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ void __init prom_init(void) @@ -155,7 +155,7 @@ void __init prom_init(void) struct callvectors *cv = (struct callvectors *) fw_arg3; int i; -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT char *ptr; printk("prom_init - MIPS64\n"); @@ -197,7 +197,7 @@ void __init prom_init(void) } printk("arcs_cmdline: %s\n", arcs_cmdline); -#else /* CONFIG_MIPS64 */ +#else /* CONFIG_64BIT */ /* save the PROM vectors for debugging use */ debug_vectors = cv; @@ -222,7 +222,7 @@ void __init prom_init(void) } env++; } -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ mips_machgroup = MACH_GROUP_MOMENCO; mips_machtype = MACH_MOMENCO_OCELOT_C; @@ -232,7 +232,7 @@ void __init prom_init(void) get_mac(prom_mac_addr_base); #endif -#ifndef CONFIG_MIPS64 +#ifndef CONFIG_64BIT debug_vectors->printf("Booting Linux kernel...\n"); #endif } diff --git a/arch/mips/momentum/ocelot_c/reset.c b/arch/mips/momentum/ocelot_c/reset.c index 1f2b4263cc8c..6a2489f3b9a0 100644 --- a/arch/mips/momentum/ocelot_c/reset.c +++ b/arch/mips/momentum/ocelot_c/reset.c @@ -28,7 +28,7 @@ void momenco_ocelot_restart(char *command) { /* base address of timekeeper portion of part */ void *nvram = (void *) -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT 0xfffffffffc807000; #else 0xfc807000; diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c index 021c00e3c07c..844ddd06349b 100644 --- a/arch/mips/momentum/ocelot_c/setup.c +++ b/arch/mips/momentum/ocelot_c/setup.c @@ -109,7 +109,7 @@ void PMON_v2_setup(void) */ printk("PMON_v2_setup\n"); -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* marvell and extra space */ add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xfffffffff4000000, PM_64K); /* fpga, rtc, and uart */ @@ -134,7 +134,7 @@ void PMON_v2_setup(void) unsigned long m48t37y_get_time(void) { -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT unsigned char *rtc_base = (unsigned char*)0xfffffffffc800000; #else unsigned char* rtc_base = (unsigned char*)0xfc800000; @@ -163,7 +163,7 @@ unsigned long m48t37y_get_time(void) int m48t37y_set_time(unsigned long sec) { -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT unsigned char* rtc_base = (unsigned char*)0xfffffffffc800000; #else unsigned char* rtc_base = (unsigned char*)0xfc800000; @@ -342,7 +342,7 @@ static void __init momenco_ocelot_c_setup(void) early_initcall(momenco_ocelot_c_setup); -#ifndef CONFIG_MIPS64 +#ifndef CONFIG_64BIT /* This needs to be one of the first initcalls, because no I/O port access can work before this */ static int io_base_ioremap(void) diff --git a/arch/mips/pci/pci-ip32.c b/arch/mips/pci/pci-ip32.c index 1faeb034f06e..000dc6af6cd3 100644 --- a/arch/mips/pci/pci-ip32.c +++ b/arch/mips/pci/pci-ip32.c @@ -84,7 +84,7 @@ static irqreturn_t macepci_error(int irq, void *dev, struct pt_regs *regs) extern struct pci_ops mace_pci_ops; -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT static struct resource mace_pci_mem_resource = { .name = "SGI O2 PCI MEM", .start = MACEPCI_HI_MEMORY, diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c index d6d0364fa760..d86943f9d812 100644 --- a/arch/mips/sibyte/cfe/setup.c +++ b/arch/mips/sibyte/cfe/setup.c @@ -33,7 +33,7 @@ #include "cfe_error.h" /* Max ram addressable in 32-bit segments */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define MAX_RAM_SIZE (~0ULL) #else #ifdef CONFIG_HIGHMEM diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c index 457aeb7be858..4742e4fc89f7 100644 --- a/arch/mips/sibyte/swarm/setup.c +++ b/arch/mips/sibyte/swarm/setup.c @@ -73,7 +73,7 @@ int swarm_be_handler(struct pt_regs *regs, int is_fixup) { if (!is_fixup && (regs->cp0_cause & 4)) { /* Data bus error - print PA */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT printk("DBE physical address: %010lx\n", __read_64bit_c0_register($26, 1)); #else diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index b594768b0241..879036d4b30b 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig @@ -455,7 +455,7 @@ config INITRAMFS_ROOT_GID #for instance. config LBD bool "Support for Large Block Devices" - depends on X86 || MIPS32 || PPC32 || ARCH_S390_31 || SUPERH || UML + depends on X86 || (MIPS && 32BIT) || PPC32 || ARCH_S390_31 || SUPERH || UML help Say Y here if you want to attach large (bigger than 2TB) discs to your machine, or if you want to have a raid or loopback device diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig index 12c208fb18c5..787ad00a2b73 100644 --- a/drivers/scsi/Kconfig +++ b/drivers/scsi/Kconfig @@ -250,7 +250,7 @@ config SCSI_DECNCR config SCSI_DECSII tristate "DEC SII Scsi Driver" - depends on MACH_DECSTATION && SCSI && MIPS32 + depends on MACH_DECSTATION && SCSI && 32BIT config BLK_DEV_3W_XXXX_RAID tristate "3ware 5/6/7/8xxx ATA-RAID support" diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 74b80f7c062d..e39818a34a07 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -308,7 +308,7 @@ config SERIAL_S3C2410_CONSOLE config SERIAL_DZ bool "DECstation DZ serial driver" - depends on MACH_DECSTATION && MIPS32 + depends on MACH_DECSTATION && 32BIT select SERIAL_CORE help DZ11-family serial controllers for VAXstations, including the diff --git a/include/asm-mips/a.out.h b/include/asm-mips/a.out.h index e42b3093e903..2b3dc3bed4da 100644 --- a/include/asm-mips/a.out.h +++ b/include/asm-mips/a.out.h @@ -35,10 +35,10 @@ struct exec #ifdef __KERNEL__ -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define STACK_TOP TASK_SIZE #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define STACK_TOP (current->thread.mflags & MF_32BIT_ADDR ? TASK_SIZE32 : TASK_SIZE) #endif diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index 2caa8c427204..7dc2619f5006 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -48,7 +48,7 @@ #define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff) #define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff) -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* * Memory segments (64bit kernel mode addresses) diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h index 37a460aa0378..40ceedcf454e 100644 --- a/include/asm-mips/asmmacro.h +++ b/include/asm-mips/asmmacro.h @@ -11,10 +11,10 @@ #include <linux/config.h> #include <asm/hazards.h> -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #include <asm/asmmacro-32.h> #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #include <asm/asmmacro-64.h> #endif diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index 7d89e87bc8c6..c0bd8d014e14 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -334,7 +334,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) */ #define atomic_add_negative(i,v) (atomic_add_return(i, (v)) < 0) -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT typedef struct { volatile __s64 counter; } atomic64_t; @@ -639,7 +639,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) */ #define atomic64_add_negative(i,v) (atomic64_add_return(i, (v)) < 0) -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ /* * atomic*_return operations are serializing but not the non-*_return diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index 779d2187a6a4..bc136dcfdbe6 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -533,14 +533,14 @@ static inline unsigned long ffz(unsigned long word) int b = 0, s; word = ~word; -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s; s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s; s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s; s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s; s = 1; if (word << 31 != 0) s = 0; b += s; #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s; s = 16; if (word << 48 != 0) s = 0; b += s; word >>= s; s = 8; if (word << 56 != 0) s = 0; b += s; word >>= s; @@ -683,7 +683,7 @@ found_middle: */ static inline int sched_find_first_bit(const unsigned long *b) { -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT if (unlikely(b[0])) return __ffs(b[0]); if (unlikely(b[1])) @@ -694,7 +694,7 @@ static inline int sched_find_first_bit(const unsigned long *b) return __ffs(b[3]) + 96; return __ffs(b[4]) + 128; #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT if (unlikely(b[0])) return __ffs(b[0]); if (unlikely(b[1])) diff --git a/include/asm-mips/bugs.h b/include/asm-mips/bugs.h index 18cced19cca4..b14b961c2100 100644 --- a/include/asm-mips/bugs.h +++ b/include/asm-mips/bugs.h @@ -15,7 +15,7 @@ extern void check_bugs64(void); static inline void check_bugs(void) { check_bugs32(); -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT check_bugs64(); #endif } diff --git a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h index c25cc92b9950..c1ea5a8714f3 100644 --- a/include/asm-mips/checksum.h +++ b/include/asm-mips/checksum.h @@ -128,7 +128,7 @@ static inline unsigned int csum_tcpudp_nofold(unsigned long saddr, { __asm__( ".set\tnoat\t\t\t# csum_tcpudp_nofold\n\t" -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT "addu\t%0, %2\n\t" "sltu\t$1, %0, %2\n\t" "addu\t%0, $1\n\t" @@ -141,7 +141,7 @@ static inline unsigned int csum_tcpudp_nofold(unsigned long saddr, "sltu\t$1, %0, %4\n\t" "addu\t%0, $1\n\t" #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT "daddu\t%0, %2\n\t" "daddu\t%0, %3\n\t" "daddu\t%0, %4\n\t" diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index 1df2c299de82..9a2de642eee6 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h @@ -106,7 +106,7 @@ #define PLAT_TRAMPOLINE_STUFF_LINE 0UL #endif -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT # ifndef cpu_has_nofpuex # define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX) # endif @@ -124,7 +124,7 @@ # endif #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT # ifndef cpu_has_nofpuex # define cpu_has_nofpuex 0 # endif diff --git a/include/asm-mips/dec/prom.h b/include/asm-mips/dec/prom.h index b63e2f2317d1..a05d6d3395fe 100644 --- a/include/asm-mips/dec/prom.h +++ b/include/asm-mips/dec/prom.h @@ -48,15 +48,15 @@ */ #define REX_PROM_MAGIC 0x30464354 -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define prom_is_rex(magic) 1 /* KN04 and KN05 are REX PROMs. */ -#else /* !CONFIG_MIPS64 */ +#else /* !CONFIG_64BIT */ #define prom_is_rex(magic) ((magic) == REX_PROM_MAGIC) -#endif /* !CONFIG_MIPS64 */ +#endif /* !CONFIG_64BIT */ /* @@ -105,7 +105,7 @@ extern int (*__pmax_read)(int, void *, int); extern int (*__pmax_close)(int); -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* * On MIPS64 we have to call PROM functions via a helper @@ -138,7 +138,7 @@ int _prom_printf(int (*)(char *, ...), char *, ...) __DEC_PROM_O32; #define prom_getenv(x) _prom_getenv(__prom_getenv, x) #define prom_printf(x...) _prom_printf(__prom_printf, x) -#else /* !CONFIG_MIPS64 */ +#else /* !CONFIG_64BIT */ /* * On plain MIPS we just call PROM functions directly. @@ -160,7 +160,7 @@ int _prom_printf(int (*)(char *, ...), char *, ...) __DEC_PROM_O32; #define pmax_read __pmax_read #define pmax_close __pmax_close -#endif /* !CONFIG_MIPS64 */ +#endif /* !CONFIG_64BIT */ extern void prom_meminit(u32); diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h index d0f68447e5a7..a606dbee0412 100644 --- a/include/asm-mips/delay.h +++ b/include/asm-mips/delay.h @@ -57,11 +57,11 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj) * The common rates of 1000 and 128 are rounded wrongly by the * catchall case for 64-bit. Excessive precission? Probably ... */ -#if defined(CONFIG_MIPS64) && (HZ == 128) +#if defined(CONFIG_64BIT) && (HZ == 128) usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */ -#elif defined(CONFIG_MIPS64) && (HZ == 1000) +#elif defined(CONFIG_64BIT) && (HZ == 1000) usecs *= 0x004189374BC6A7f0UL; /* 2**64 / (1000000 / HZ) */ -#elif defined(CONFIG_MIPS64) +#elif defined(CONFIG_64BIT) usecs *= (0x8000000000000000UL / (500000 / HZ)); #else /* 32-bit junk follows here */ usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) + diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h index 7b92c8045cc2..e48811440015 100644 --- a/include/asm-mips/elf.h +++ b/include/asm-mips/elf.h @@ -125,7 +125,7 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG]; typedef double elf_fpreg_t; typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT /* * This is used to ensure we don't load something for the wrong architecture. @@ -153,9 +153,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; */ #define ELF_CLASS ELFCLASS32 -#endif /* CONFIG_MIPS32 */ +#endif /* CONFIG_32BIT */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* * This is used to ensure we don't load something for the wrong architecture. */ @@ -177,7 +177,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; */ #define ELF_CLASS ELFCLASS64 -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ /* * These are used to set parameters in the core dumps. @@ -193,7 +193,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; #ifdef __KERNEL__ -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define SET_PERSONALITY(ex, ibcs2) \ do { \ @@ -202,9 +202,9 @@ do { \ set_personality(PER_LINUX); \ } while (0) -#endif /* CONFIG_MIPS32 */ +#endif /* CONFIG_32BIT */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define SET_PERSONALITY(ex, ibcs2) \ do { current->thread.mflags &= ~MF_ABI_MASK; \ @@ -222,7 +222,7 @@ do { current->thread.mflags &= ~MF_ABI_MASK; \ set_personality(PER_LINUX); \ } while (0) -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ extern void dump_regs(elf_greg_t *, struct pt_regs *regs); extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); diff --git a/include/asm-mips/local.h b/include/asm-mips/local.h index 7eb6bf661b80..c38844f615fc 100644 --- a/include/asm-mips/local.h +++ b/include/asm-mips/local.h @@ -5,7 +5,7 @@ #include <linux/percpu.h> #include <asm/atomic.h> -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT typedef atomic_t local_t; @@ -20,7 +20,7 @@ typedef atomic_t local_t; #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT typedef atomic64_t local_t; diff --git a/include/asm-mips/mach-generic/spaces.h b/include/asm-mips/mach-generic/spaces.h index 63c0a81c7832..5a2c1efb4eb7 100644 --- a/include/asm-mips/mach-generic/spaces.h +++ b/include/asm-mips/mach-generic/spaces.h @@ -12,7 +12,7 @@ #include <linux/config.h> -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define CAC_BASE 0x80000000 #define IO_BASE 0xa0000000 @@ -32,9 +32,9 @@ #define HIGHMEM_START 0x20000000UL #endif -#endif /* CONFIG_MIPS32 */ +#endif /* CONFIG_32BIT */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* * This handles the memory map. @@ -67,6 +67,6 @@ #define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) #define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK)) -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ #endif /* __ASM_MACH_GENERIC_SPACES_H */ diff --git a/include/asm-mips/mach-ip22/spaces.h b/include/asm-mips/mach-ip22/spaces.h index 30d42fcafe3d..e96166f27c49 100644 --- a/include/asm-mips/mach-ip22/spaces.h +++ b/include/asm-mips/mach-ip22/spaces.h @@ -12,7 +12,7 @@ #include <linux/config.h> -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define CAC_BASE 0x80000000 #define IO_BASE 0xa0000000 @@ -32,9 +32,9 @@ #define HIGHMEM_START 0x20000000UL #endif -#endif /* CONFIG_MIPS32 */ +#endif /* CONFIG_32BIT */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define PAGE_OFFSET 0xffffffff80000000UL #ifndef HIGHMEM_START @@ -50,6 +50,6 @@ #define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) #define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK)) -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ #endif /* __ASM_MACH_IP22_SPACES_H */ diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h index b932237f2193..04713973c6c3 100644 --- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h @@ -18,7 +18,7 @@ * so, for 64bit IP32 kernel we just don't use ll/sc. * This does not affect luserland. */ -#if defined(CONFIG_CPU_R5000) && defined(CONFIG_MIPS64) +#if defined(CONFIG_CPU_R5000) && defined(CONFIG_64BIT) #define cpu_has_llsc 0 #else #define cpu_has_llsc 1 diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h index 48b77c9fb4f2..45cd72d172e8 100644 --- a/include/asm-mips/mmu_context.h +++ b/include/asm-mips/mmu_context.h @@ -28,17 +28,17 @@ extern unsigned long pgd_current[]; #define TLBMISS_HANDLER_SETUP_PGD(pgd) \ pgd_current[smp_processor_id()] = (unsigned long)(pgd) -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define TLBMISS_HANDLER_SETUP() \ write_c0_context((unsigned long) smp_processor_id() << 23); \ TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) #endif -#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) +#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) #define TLBMISS_HANDLER_SETUP() \ write_c0_context((unsigned long) &pgd_current[smp_processor_id()] << 23); \ TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) #endif -#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64) +#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64) #define TLBMISS_HANDLER_SETUP() \ write_c0_context((unsigned long) smp_processor_id() << 23); \ TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h index 90ee24aad955..0be58b2aeb9f 100644 --- a/include/asm-mips/module.h +++ b/include/asm-mips/module.h @@ -25,7 +25,7 @@ typedef struct Elf64_Sxword r_addend; /* Addend. */ } Elf64_Mips_Rela; -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define Elf_Shdr Elf32_Shdr #define Elf_Sym Elf32_Sym @@ -33,7 +33,7 @@ typedef struct #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define Elf_Shdr Elf64_Shdr #define Elf_Sym Elf64_Sym diff --git a/include/asm-mips/msgbuf.h b/include/asm-mips/msgbuf.h index 513b2824838b..a1533959742e 100644 --- a/include/asm-mips/msgbuf.h +++ b/include/asm-mips/msgbuf.h @@ -15,25 +15,25 @@ struct msqid64_ds { struct ipc64_perm msg_perm; -#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN) +#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN) unsigned long __unused1; #endif __kernel_time_t msg_stime; /* last msgsnd time */ -#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN) +#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN) unsigned long __unused1; #endif -#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN) +#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN) unsigned long __unused2; #endif __kernel_time_t msg_rtime; /* last msgrcv time */ -#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN) +#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN) unsigned long __unused2; #endif -#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN) +#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN) unsigned long __unused3; #endif __kernel_time_t msg_ctime; /* last change time */ -#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN) +#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN) unsigned long __unused3; #endif unsigned long msg_cbytes; /* current number of bytes on queue */ diff --git a/include/asm-mips/paccess.h b/include/asm-mips/paccess.h index 36cec9e31696..309bc3099f68 100644 --- a/include/asm-mips/paccess.h +++ b/include/asm-mips/paccess.h @@ -16,10 +16,10 @@ #include <linux/config.h> #include <linux/errno.h> -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define __PA_ADDR ".word" #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define __PA_ADDR ".dword" #endif diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h index 2d63f5ba403f..ce57288d43bd 100644 --- a/include/asm-mips/pgalloc.h +++ b/include/asm-mips/pgalloc.h @@ -85,7 +85,7 @@ static inline void pte_free(struct page *pte) #define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define pgd_populate(mm, pmd, pte) BUG() /* @@ -97,7 +97,7 @@ static inline void pte_free(struct page *pte) #define __pmd_free_tlb(tlb,x) do { } while (0) #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd)) diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h index e76ccd6e3a5d..dbe13da0bdad 100644 --- a/include/asm-mips/pgtable.h +++ b/include/asm-mips/pgtable.h @@ -11,10 +11,10 @@ #include <asm-generic/4level-fixup.h> #include <linux/config.h> -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #include <asm/pgtable-32.h> #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #include <asm/pgtable-64.h> #endif diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h index 13c54d5b3b48..d6466aa09fb7 100644 --- a/include/asm-mips/processor.h +++ b/include/asm-mips/processor.h @@ -33,7 +33,7 @@ extern void (*cpu_wait)(void); extern unsigned int vced_count, vcei_count; -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT /* * User space process size: 2GB. This is hardcoded into a few places, * so don't change it unless you know what you are doing. @@ -47,7 +47,7 @@ extern unsigned int vced_count, vcei_count; #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3)) #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT /* * User space process size: 1TB. This is hardcoded into a few places, * so don't change it unless you know what you are doing. TASK_SIZE diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h index d3c46d633826..2b5c624c3d4f 100644 --- a/include/asm-mips/ptrace.h +++ b/include/asm-mips/ptrace.h @@ -28,7 +28,7 @@ * system call/exception. As usual the registers k0/k1 aren't being saved. */ struct pt_regs { -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT /* Pad bytes for argument save space on the stack. */ unsigned long pad0[6]; #endif diff --git a/include/asm-mips/reg.h b/include/asm-mips/reg.h index 7b33bbca9585..a1ebd3aa93af 100644 --- a/include/asm-mips/reg.h +++ b/include/asm-mips/reg.h @@ -14,7 +14,7 @@ #include <linux/config.h> -#if defined(CONFIG_MIPS32) || defined(WANT_COMPAT_REG_H) +#if defined(CONFIG_32BIT) || defined(WANT_COMPAT_REG_H) #define EF_R0 6 #define EF_R1 7 @@ -70,7 +70,7 @@ #endif -#if CONFIG_MIPS64 +#if CONFIG_64BIT #define EF_R0 0 #define EF_R1 1 @@ -124,6 +124,6 @@ #define EF_SIZE 304 /* size in bytes */ -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ #endif /* __ASM_MIPS_REG_H */ diff --git a/include/asm-mips/resource.h b/include/asm-mips/resource.h index fd3c6d17a5f6..1fba00c22077 100644 --- a/include/asm-mips/resource.h +++ b/include/asm-mips/resource.h @@ -27,7 +27,7 @@ * but we keep the old value on MIPS32, * for compatibility: */ -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT # define RLIM_INFINITY 0x7fffffffUL #endif diff --git a/include/asm-mips/sgiarcs.h b/include/asm-mips/sgiarcs.h index 59450335f049..722b77a8c5e5 100644 --- a/include/asm-mips/sgiarcs.h +++ b/include/asm-mips/sgiarcs.h @@ -367,7 +367,7 @@ struct linux_smonblock { * Macros for calling a 32-bit ARC implementation from 64-bit code */ -#if defined(CONFIG_MIPS64) && defined(CONFIG_ARC32) +#if defined(CONFIG_64BIT) && defined(CONFIG_ARC32) #define __arc_clobbers \ "$2","$3" /* ... */, "$8","$9","$10","$11", \ @@ -476,10 +476,10 @@ struct linux_smonblock { __res; \ }) -#endif /* defined(CONFIG_MIPS64) && defined(CONFIG_ARC32) */ +#endif /* defined(CONFIG_64BIT) && defined(CONFIG_ARC32) */ -#if (defined(CONFIG_MIPS32) && defined(CONFIG_ARC32)) || \ - (defined(CONFIG_MIPS64) && defined(CONFIG_ARC64)) +#if (defined(CONFIG_32BIT) && defined(CONFIG_ARC32)) || \ + (defined(CONFIG_64BIT) && defined(CONFIG_ARC64)) #define ARC_CALL0(dest) \ ({ long __res; \ diff --git a/include/asm-mips/siginfo.h b/include/asm-mips/siginfo.h index a0e26e6c994d..698becab5a9e 100644 --- a/include/asm-mips/siginfo.h +++ b/include/asm-mips/siginfo.h @@ -25,10 +25,10 @@ struct siginfo; /* * Careful to keep union _sifields from shifting ... */ -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int)) #endif -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) #endif diff --git a/include/asm-mips/sim.h b/include/asm-mips/sim.h index 6333169be329..3ccfe09fa744 100644 --- a/include/asm-mips/sim.h +++ b/include/asm-mips/sim.h @@ -16,7 +16,7 @@ #define __str2(x) #x #define __str(x) __str2(x) -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define save_static_function(symbol) \ __asm__ ( \ @@ -42,9 +42,9 @@ __asm__ ( \ #define nabi_no_regargs -#endif /* CONFIG_MIPS32 */ +#endif /* CONFIG_32BIT */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define save_static_function(symbol) \ __asm__ ( \ @@ -78,6 +78,6 @@ __asm__ ( \ unsigned long __dummy6, \ unsigned long __dummy7, -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ #endif /* _ASM_SIM_H */ diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h index 86283c25fd5b..fb42f99f8527 100644 --- a/include/asm-mips/stackframe.h +++ b/include/asm-mips/stackframe.h @@ -26,7 +26,7 @@ .macro SAVE_TEMP mfhi v1 -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT LONG_S $8, PT_R8(sp) LONG_S $9, PT_R9(sp) #endif @@ -56,7 +56,7 @@ #ifdef CONFIG_SMP .macro get_saved_sp /* SMP variation */ -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT mfc0 k0, CP0_CONTEXT lui k1, %hi(kernelsp) srl k0, k0, 23 @@ -64,7 +64,7 @@ addu k1, k0 LONG_L k1, %lo(kernelsp)(k1) #endif -#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) +#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) MFC0 k1, CP0_CONTEXT dsra k1, 23 lui k0, %hi(pgd_current) @@ -74,7 +74,7 @@ daddu k1, k0 LONG_L k1, %lo(kernelsp)(k1) #endif -#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64) +#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64) MFC0 k1, CP0_CONTEXT dsrl k1, 23 dsll k1, k1, 3 @@ -83,20 +83,20 @@ .endm .macro set_saved_sp stackp temp temp2 -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT mfc0 \temp, CP0_CONTEXT srl \temp, 23 sll \temp, 2 LONG_S \stackp, kernelsp(\temp) #endif -#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) +#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64) lw \temp, TI_CPU(gp) dsll \temp, 3 lui \temp2, %hi(kernelsp) daddu \temp, \temp2 LONG_S \stackp, %lo(kernelsp)(\temp) #endif -#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64) +#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64) lw \temp, TI_CPU(gp) dsll \temp, 3 LONG_S \stackp, kernelsp(\temp) @@ -140,7 +140,7 @@ LONG_S $6, PT_R6(sp) MFC0 v1, CP0_EPC LONG_S $7, PT_R7(sp) -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT LONG_S $8, PT_R8(sp) LONG_S $9, PT_R9(sp) #endif @@ -169,7 +169,7 @@ .macro RESTORE_TEMP LONG_L $24, PT_LO(sp) -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT LONG_L $8, PT_R8(sp) LONG_L $9, PT_R9(sp) #endif @@ -217,7 +217,7 @@ LONG_L $31, PT_R31(sp) LONG_L $28, PT_R28(sp) LONG_L $25, PT_R25(sp) -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT LONG_L $8, PT_R8(sp) LONG_L $9, PT_R9(sp) #endif @@ -262,7 +262,7 @@ LONG_L $31, PT_R31(sp) LONG_L $28, PT_R28(sp) LONG_L $25, PT_R25(sp) -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT LONG_L $8, PT_R8(sp) LONG_L $9, PT_R9(sp) #endif diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h index b18345504f8a..5a06f6d13899 100644 --- a/include/asm-mips/string.h +++ b/include/asm-mips/string.h @@ -16,7 +16,7 @@ * Most of the inline functions are rather naive implementations so I just * didn't bother updating them for 64-bit ... */ -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #ifndef IN_STRING_C @@ -130,7 +130,7 @@ strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count) return __res; } -#endif /* CONFIG_MIPS32 */ +#endif /* CONFIG_32BIT */ #define __HAVE_ARCH_MEMSET extern void *memset(void *__s, int __c, size_t __count); @@ -141,7 +141,7 @@ extern void *memcpy(void *__to, __const__ void *__from, size_t __n); #define __HAVE_ARCH_MEMMOVE extern void *memmove(void *__dest, __const__ void *__src, size_t __n); -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define __HAVE_ARCH_MEMSCAN static __inline__ void *memscan(void *__addr, int __c, size_t __size) { @@ -161,6 +161,6 @@ static __inline__ void *memscan(void *__addr, int __c, size_t __size) return __addr; } -#endif /* CONFIG_MIPS32 */ +#endif /* CONFIG_32BIT */ #endif /* _ASM_STRING_H */ diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h index 169f3d4265b1..6663efd49b27 100644 --- a/include/asm-mips/system.h +++ b/include/asm-mips/system.h @@ -208,7 +208,7 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) return retval; } -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) { __u64 retval; @@ -330,7 +330,7 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, return retval; } -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old, unsigned long new) { diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h index 42fcd6f2c206..a70cb0854c8a 100644 --- a/include/asm-mips/thread_info.h +++ b/include/asm-mips/thread_info.h @@ -62,10 +62,10 @@ register struct thread_info *__current_thread_info __asm__("$28"); #define current_thread_info() __current_thread_info /* thread information allocation */ -#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS32) +#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT) #define THREAD_SIZE_ORDER (1) #endif -#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS64) +#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT) #define THREAD_SIZE_ORDER (2) #endif #ifdef CONFIG_PAGE_SIZE_8KB diff --git a/include/asm-mips/types.h b/include/asm-mips/types.h index b949ab33e8e2..421b3aea14cc 100644 --- a/include/asm-mips/types.h +++ b/include/asm-mips/types.h @@ -78,7 +78,7 @@ typedef unsigned long long u64; #endif #if (defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR)) \ - || defined(CONFIG_MIPS64) + || defined(CONFIG_64BIT) typedef u64 dma_addr_t; #else typedef u32 dma_addr_t; diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h index 07114898e065..a543ead72ecf 100644 --- a/include/asm-mips/uaccess.h +++ b/include/asm-mips/uaccess.h @@ -22,7 +22,7 @@ * * For historical reasons, these macros are grossly misnamed. */ -#ifdef CONFIG_MIPS32 +#ifdef CONFIG_32BIT #define __UA_LIMIT 0x80000000UL @@ -32,9 +32,9 @@ #define __UA_t0 "$8" #define __UA_t1 "$9" -#endif /* CONFIG_MIPS32 */ +#endif /* CONFIG_32BIT */ -#ifdef CONFIG_MIPS64 +#ifdef CONFIG_64BIT #define __UA_LIMIT (- TASK_SIZE) @@ -44,7 +44,7 @@ #define __UA_t0 "$12" #define __UA_t1 "$13" -#endif /* CONFIG_MIPS64 */ +#endif /* CONFIG_64BIT */ /* * USER_DS is a bitmask that has the bits set that may not be set in a valid diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h index 6d21cc964f76..ad4d48056307 100644 --- a/include/asm-mips/unistd.h +++ b/include/asm-mips/unistd.h @@ -1124,7 +1124,7 @@ type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \ # ifndef __mips64 # define __ARCH_WANT_STAT64 # endif -# ifdef CONFIG_MIPS32 +# ifdef CONFIG_32BIT # define __ARCH_WANT_SYS_TIME # endif # ifdef CONFIG_MIPS32_O32 |