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| author |   Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> | 2021-07-08 12:42:22 +0530 |
|---|---|---|
| committer |   Matthew Auld <matthew.auld@intel.com> | 2021-07-08 10:07:12 +0100 |
| commit | 88c6317b36c0d90c903b8d04fa296ca109e4e2da (patch) | |
| tree | 7bf493a270f614deeb8a9844b43a8b5a605da82e | |
| parent | drm/i915/gt: finish INTEL_GEN and friends conversion (diff) | |
| download | wireguard-linux-88c6317b36c0d90c903b8d04fa296ca109e4e2da.tar.xz wireguard-linux-88c6317b36c0d90c903b8d04fa296ca109e4e2da.zip | |
drm/i915/adl_s: Fix dma_mask_size to 39 bit
46 bit addressing enables you to use 4 bits to support some
MKTME features, and 3 more bits for Optane support that uses
a subset of MTKME for persistent memory.
But GTT addressing sticking to 39 bit addressing, thus setting
dma_mask_size to 39 fixes below tests :
igt@i915_selftest@live@mman
igt@kms_big_fb@linear-32bpp-rotate-0
igt@gem_create@create-clear
igt@gem_mmap_offset@clear
igt@gem_mmap_gtt@cpuset-big-copy
In a way solves Gitlab#3142
https://gitlab.freedesktop.org/drm/intel/-/issues/3142, which had
following errors :
DMAR: DRHD: handling fault status reg 2
DMAR: [DMA Write] Request device [00:02.0] PASID ffffffff fault addr
7effff9000 [fault reason 05] PTE Write access is not set
0x7effff9000 is suspiciously exactly 39 bits, so it seems likely that
the HW just ends up masking off those extra bits hence DMA errors.
Changes since V2 :
- dim checkpatch error solved
Changes since V1 :
- Added more details to commit message - Matthew Auld
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Acked-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210708071222.955455-1-tejaskumarx.surendrakumar.upadhyay@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 83b500bb170c..866ba136794c 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -936,7 +936,7 @@ static const struct intel_device_info adl_s_info = { .display.has_psr_hw_tracking = 0, .platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), - .dma_mask_size = 46, + .dma_mask_size = 39, }; #define XE_LPD_FEATURES \ |