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authorBert Vermeulen <bert@biot.com>2021-01-19 10:21:05 +0100
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2021-02-04 20:17:11 +0100
commit8e5cee476902ae39d90e425a6fa976e1b901544c (patch)
tree7a8a1ed385c51759212063af04509efd3bde15ed
parentMIPS: ralink: manage low reset lines (diff)
downloadwireguard-linux-8e5cee476902ae39d90e425a6fa976e1b901544c.tar.xz
wireguard-linux-8e5cee476902ae39d90e425a6fa976e1b901544c.zip
dt-bindings: mips: Add support for RTL83xx SoC series
Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-rw-r--r--Documentation/devicetree/bindings/mips/realtek-rtl.yaml24
1 files changed, 24 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mips/realtek-rtl.yaml b/Documentation/devicetree/bindings/mips/realtek-rtl.yaml
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index 000000000000..aadff8ce0f49
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/realtek-rtl.yaml
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/realtek-rtl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Realtek RTL83xx/93xx SoC series device tree bindings
+
+maintainers:
+ - Bert Vermeulen <bert@biot.com>
+ - Sander Vanheule <sander@svanheule.net>
+
+properties:
+ $nodename:
+ const: "/"
+ compatible:
+ oneOf:
+ # RTL8382-based boards
+ - items:
+ - enum:
+ - cisco,sg220-26
+ - const: realtek,rtl8382-soc
+
+additionalProperties: true