diff options
| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2017-02-24 14:59:28 +0100 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2017-03-07 07:50:56 +0100 |
| commit | 9190748fd608dc3aa80edacab9e6818f2d6f71b6 (patch) | |
| tree | 10674ec9343747c73dd633ce2f91e0884935bfaf | |
| parent | arm64: dts: r8a7795: Add Cortex-A53 CPU cores (diff) | |
| download | wireguard-linux-9190748fd608dc3aa80edacab9e6818f2d6f71b6.tar.xz wireguard-linux-9190748fd608dc3aa80edacab9e6818f2d6f71b6.zip | |
arm64: dts: r8a7795: Add Cortex-A53 PMU node
Enable the performance monitor unit for the Cortex-A53 cores on the
R8A7795 SoC.
Extracted from a patch by Takeshi Kihara in the BSP.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 61830697e33c..3573872974e0 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -340,6 +340,18 @@ <&a57_3>; }; + pmu_a53 { + compatible = "arm,cortex-a53-pmu"; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&a53_0>, + <&a53_1>, + <&a53_2>, + <&a53_3>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 |