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authorChris Brandt <chris.brandt@renesas.com>2017-03-29 10:30:31 -0700
committerSimon Horman <horms+renesas@verge.net.au>2017-04-04 12:57:24 -0400
commit929ded3dd7ce91d9ef4143d673b4ace2eb9ab355 (patch)
treece277d4830e29a767172262b470d22630bf4dfd2
parentARM: dts: koelsch: Correct clock frequency of X2 DU clock input (diff)
downloadwireguard-linux-929ded3dd7ce91d9ef4143d673b4ace2eb9ab355.tar.xz
wireguard-linux-929ded3dd7ce91d9ef4143d673b4ace2eb9ab355.zip
ARM: dts: r7s72100: add rtc clock to device tree
Add the realtime clock functional clock source. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r7s72100.dtsi9
-rw-r--r--include/dt-bindings/clock/r7s72100-clock.h3
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 47ef53a4c8bf..9eace892fec7 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -117,6 +117,15 @@
clock-output-names = "ostm0", "ostm1";
};
+ mstp6_clks: mstp6_clks@fcfe042c {
+ #clock-cells = <1>;
+ compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0xfcfe042c 4>;
+ clocks = <&p0_clk>;
+ clock-indices = <R7S72100_CLK_RTC>;
+ clock-output-names = "rtc";
+ };
+
mstp7_clks: mstp7_clks@fcfe0430 {
#clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
index cd2ed5194255..bc256d31099a 100644
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -29,6 +29,9 @@
#define R7S72100_CLK_OSTM0 1
#define R7S72100_CLK_OSTM1 0
+/* MSTP6 */
+#define R7S72100_CLK_RTC 0
+
/* MSTP7 */
#define R7S72100_CLK_ETHER 4