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| author |   Marc Zyngier <marc.zyngier@arm.com> | 2017-07-01 15:16:34 +0100 |
|---|---|---|
| committer |   Gregory CLEMENT <gregory.clement@free-electrons.com> | 2017-08-02 16:07:38 +0200 |
| commit | 95696d292e204073433ed2ef3ff4d3d8f42a8248 (patch) | |
| tree | 4133b3b1653b15d6980d7cfcd12c7ac2fb41ade5 | |
| parent | ARM64: dts: marvell: armada-37xx: Fix the number of GPIO on south bridge (diff) | |
| download | wireguard-linux-95696d292e204073433ed2ef3ff4d3d8f42a8248.tar.xz wireguard-linux-95696d292e204073433ed2ef3ff4d3d8f42a8248.zip | |
ARM64: dts: marvell: armada-37xx: Fix GIC maintenance interrupt
The GIC-500 integrated in the Armada-37xx SoCs is compliant with
the GICv3 architecture, and thus provides a maintenance interrupt
that is required for hypervisors to function correctly.
With the interrupt provided in the DT, KVM now works as it should.
Tested on an Espressobin system.
Fixes: adbc3695d9e4 ("arm64: dts: add the Marvell Armada 3700 family and
a development board")
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 51763d674050..a92ac63addf0 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -323,6 +323,7 @@ interrupt-controller; reg = <0x1d00000 0x10000>, /* GICD */ <0x1d40000 0x40000>; /* GICR */ + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; }; }; |